BD8389FV-ME2 - ROHM Semiconductor

BD8389FV-ME2 Frequently Asked Questions (FAQs)

• What is the recommended PCB layout for optimal thermal performance?
  A recommended PCB layout for optimal thermal performance would be to have a large copper area on the bottom layer connected to the thermal pad of the IC, and to use thermal vias to dissipate heat to the top layer. Additionally, keeping the thermal pad away from other components and traces can help reduce thermal resistance.
• How do I ensure stable operation with a high-ESR output capacitor?
  To ensure stable operation with a high-ESR output capacitor, it's recommended to add a small ceramic capacitor (e.g. 1uF) in parallel with the high-ESR capacitor to improve the overall ESR and reduce the risk of oscillation.
• What is the maximum allowed voltage on the EN pin?
  The maximum allowed voltage on the EN pin is VCC + 0.3V, which is 5.5V in the case of the BD8389FV-ME2. Exceeding this voltage may damage the internal circuitry.
• Can I use a lower value for the bootstrap capacitor (CBST) than recommended?
  While it's technically possible to use a lower value for the bootstrap capacitor, it's not recommended as it may affect the stability and reliability of the converter. The recommended value of 10nF is chosen to ensure proper operation and minimize the risk of oscillation.
• How do I handle the power-on reset (POR) function during power-up?
  The POR function is designed to reset the internal circuitry during power-up. To handle this, ensure that the input voltage rises slowly and monotonically, and that the EN pin is pulled high after the input voltage has reached a stable level.