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BDP949 - Infineon

Description: Silicon NPN Transistor

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PCB Footprints
BDP949 - Infineon PCB footprint - SOT223 (3-Pin) - SOT223 (3-Pin) - SOT223 (SC73)-1
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3D Models
BDP949 - Infineon  - 3D model - SOT223 (3-Pin) - SOT223 (SC73)-1
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BDP949 Details

  • Manufacturer Part Number:

    BDP949

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    End Of Life

  • Part Package Code:

    SOT-223

  • Pin Count:

    4

  • ECCN Code:

    EAR99

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    3.43

  • Case Connection:

    COLLECTOR

  • Collector Current-Max (IC):

    3 A

  • Collector-Emitter Voltage-Max:

    60 V

  • Configuration:

    SINGLE

  • DC Current Gain-Min (hFE):

    50

  • JESD-30 Code:

    R-PDSO-G4

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    4

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Polarity/Channel Type:

    NPN

  • Power Dissipation-Max (Abs):

    1.5 W

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Position:

    DUAL

  • Transistor Application:

    AMPLIFIER

  • Transistor Element Material:

    SILICON

  • Transition Frequency-Nom (fT):

    100 MHz

BDP949 Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane and thermal vias is recommended. Ensure a minimum of 1mm clearance around the device for airflow and heat dissipation.
  • Implement a thermal management system, such as a heat sink or fan, to maintain a junction temperature below 150°C. Monitor the device's thermal status using the built-in thermal monitoring feature.
  • Use a minimum of 2x 10uF ceramic capacitors (X7R or X5R) for decoupling, placed as close as possible to the device's power pins. Ensure a low-inductance path between the capacitors and the device.
  • Use a low-loss PCB material, minimize trace lengths, and avoid vias and right-angle bends. Implement a controlled impedance layout, and consider using a shielded enclosure to reduce EMI.
  • Consult the datasheet for specific settings. Typically, the internal regulators are set to 1.2V for VCC and 3.3V for VDD. Adjust these settings based on your specific application requirements.

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BDP949 Overview

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