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BSC010N04LSI - Infineon

Description: MOSFET N-Ch 40V 100A TDSON-8 FL OptiMOS

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BSC010N04LSI - Infineon PCB footprint - Other - Other - TDSON-8FL
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BSC010N04LSI Details

  • Manufacturer Part Number:

    BSC010N04LSI

  • Pbfree Code:

    No

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Pin Count:

    8

  • Country Of Origin:

    Germany, Mainland China

  • ECCN Code:

    EAR99

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    6

  • Additional Feature:

    ULTRA LOW RESISTANCE

  • Avalanche Energy Rating (Eas):

    230 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    40 V

  • Drain Current-Max (ID):

    37 A

  • Drain-source On Resistance-Max:

    0.0014 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-PDSO-F8

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    8

  • Operating Mode:

    ENHANCEMENT MODE

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Polarity/Channel Type:

    N-CHANNEL

  • Pulsed Drain Current-Max (IDM):

    400 A

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Transistor Element Material:

    SILICON

BSC010N04LSI Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for the BSC010N04LSI is -40°C to 150°C.
  • Infineon recommends a symmetrical PCB layout with a solid ground plane, and to keep the high-current paths as short as possible to minimize EMI.
  • Proper cooling can be achieved by using a heat sink with a thermal resistance of ≤ 10 K/W, and ensuring good airflow around the device.
  • The maximum allowed voltage transient for the BSC010N04LSI is ±50 V, with a duration of ≤ 100 ns.
  • Yes, the BSC010N04LSI can be used in a parallel configuration, but it's essential to ensure that the devices are properly matched and that the PCB layout is designed to minimize current imbalance.

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