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CES388,L3F - Toshiba

Description: Schottky Diodes & Rectifiers SM Sig Schotky Barrier Diode 40 VR 0.1A 1 Circuit

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PCB Footprints
CES388,L3F - Toshiba PCB footprint - Small Outline Diode Flat Lead - Small Outline Diode Flat Lead - ESC(1-1G1A)
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3D Models
CES388,L3F - Toshiba  - 3D model - Small Outline Diode Flat Lead - ESC(1-1G1A)
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CES388,L3F Details

  • Manufacturer Part Number:

    CES388,L3F

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    SC-79, SOD-523, 2 PIN

  • ECCN Code:

    EAR99

  • HTS Code:

    8541.10.00.70

  • Factory Lead Time:

    16 Weeks

  • Manufacturer:

    Toshiba America Electronic Components

  • YTEOL:

    6

  • Application:

    GENERAL PURPOSE

  • Configuration:

    SINGLE

  • Diode Element Material:

    SILICON

  • Diode Type:

    RECTIFIER DIODE

  • Forward Voltage-Max (VF):

    0.6 V

  • JESD-30 Code:

    R-PDSO-F2

  • Moisture Sensitivity Level:

    1

  • Non-rep Pk Forward Current-Max:

    1 A

  • Number of Elements:

    1

  • Number of Phases:

    1

  • Number of Terminals:

    2

  • Operating Temperature-Max:

    125 °C

  • Output Current-Max:

    0.1 A

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Power Dissipation-Max:

    0.15 W

  • Reference Standard:

    AEC-Q101

  • Rep Pk Reverse Voltage-Max:

    45 V

  • Reverse Current-Max:

    5 µA

  • Reverse Test Voltage:

    40 V

  • Surface Mount:

    YES

  • Technology:

    SCHOTTKY

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

CES388,L3F Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane and a separate power plane is recommended. Keep the analog and digital grounds separate and connect them at a single point. Use a 10uF capacitor between VCC and GND, and a 100nF capacitor between AVCC and AGND.
  • Use a 3.3V power supply with a minimum of 10uF decoupling capacitor between VCC and GND, and a 100nF decoupling capacitor between AVCC and AGND. Place the decoupling capacitors as close to the IC as possible.
  • The recommended clock frequency is 24.576 MHz, but the device can operate with a clock frequency range of 24.000 MHz to 25.000 MHz.
  • The CES388/L3F can be configured for I2S or PCM mode by setting the MODE pin high or low, respectively. In I2S mode, the device operates as a slave, and in PCM mode, it operates as a master.
  • The maximum data transfer rate of the CES388/L3F is 192 kHz, which is suitable for high-quality audio applications.

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