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CPH6347-TL-W - onsemi

Description: Single P-Channel Power MOSFET, -20V, -6A, 39mΩ

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CPH6347-TL-W - onsemi  - 3D model
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CPH6347-TL-W Details

  • Manufacturer Part Number:

    CPH6347-TL-W

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    CPH-6

  • Package Description:

    SC-74, SOT-26, SOT-457, 6 PIN

  • Manufacturer Package Code:

    318BD

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    4 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    0

  • Additional Feature:

    ESD PROTECTED

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    20 V

  • Drain Current-Max (ID):

    6 A

  • Drain-source On Resistance-Max:

    0.039 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-PDSO-G6

  • JESD-609 Code:

    e6

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    6

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    P-CHANNEL

  • Power Dissipation-Max (Abs):

    1.6 W

  • Pulsed Drain Current-Max (IDM):

    24 A

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin/Bismuth (Sn/Bi)

  • Terminal Form:

    GULL WING

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Element Material:

    SILICON

CPH6347-TL-W Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. Keep the thermal pad connected to the ground plane to improve heat dissipation.
  • Ensure proper heat sinking, use a thermal interface material (TIM) between the device and heat sink, and follow the recommended PCB layout. Also, consider derating the device's power dissipation according to the temperature derating curve in the datasheet.
  • The maximum allowable voltage on the input pins is the supply voltage (VCC) + 0.3V. Exceeding this voltage may cause damage to the device.
  • Follow proper ESD handling procedures during assembly and storage. Use ESD-protective packaging and handling materials. The device has built-in ESD protection, but it's not a substitute for proper handling and assembly practices.
  • Store the devices in a dry, cool place with a temperature range of -40°C to 30°C and relative humidity below 60%. Avoid exposing the devices to direct sunlight, moisture, or extreme temperatures.

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CPH6347-TL-W Overview

Use the download button to access the CPH6347-TL-W 3D model. You can still request or build the schematic symbol and PCB footprint by using the respective build or request forms on this page.
To find more CAD model downloads similar to this part, try a partial part number search, like CPH63, or try a keyword search, such as Power Field-Effect Transistors

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