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CS5381-KZZ - Cirrus Logic

Description: Audio A/D Converter ICs 120dB 192kHz Multi-Bit ADC

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CS5381-KZZ - Cirrus Logic PCB footprint - Small Outline Packages - Small Outline Packages - CS4350-DZZ
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CS5381-KZZ - Cirrus Logic  - 3D model - Small Outline Packages - CS4350-DZZ
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CS5381-KZZ Details

  • Manufacturer Part Number:

    CS5381-KZZ

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    TSSOP

  • Package Description:

    4.4 MM WIDTH, LEAD FREE, MO-153, TSSOP-24

  • Pin Count:

    24

  • HTS Code:

    8542.39.00.30

  • Manufacturer:

    Cirrus Logic

  • YTEOL:

    0

  • Analog Input Voltage-Max:

    5.9 V

  • Analog Input Voltage-Min:

    -5.9 V

  • Conversion Time-Max:

    520 µs

  • Converter Type:

    ADC, DELTA-SIGMA

  • JESD-30 Code:

    R-PDSO-G24

  • JESD-609 Code:

    e3

  • Length:

    7.8 mm

  • Moisture Sensitivity Level:

    3

  • Number of Analog In Channels:

    2

  • Number of Bits:

    24

  • Number of Functions:

    1

  • Number of Terminals:

    24

  • Operating Temperature-Max:

    70 °C

  • Operating Temperature-Min:

    -10 °C

  • Output Bit Code:

    2'S COMPLEMENT BINARY

  • Output Format:

    SERIAL

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    TSSOP

  • Package Equivalence Code:

    TSSOP24,.25

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Qualification Status:

    Not Qualified

  • Sample Rate:

    0.192 MHz

  • Sample and Hold / Track and Hold:

    SAMPLE

  • Seated Height-Max:

    1.1 mm

  • Supply Current-Max:

    43 mA

  • Supply Voltage-Nom:

    5 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Temperature Grade:

    COMMERCIAL

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.65 mm

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    40

  • Width:

    4.4 mm

CS5381-KZZ Frequently Asked Questions (FAQs)

  • The optimal clock frequency for the CS5381-KZZ is between 256 fs and 512 fs, where fs is the sampling frequency. This ensures proper operation and minimizes jitter.
  • The analog input channels should be terminated with a 1 kΩ resistor to ground to prevent oscillations and ensure proper signal integrity.
  • The recommended power-up sequence is to apply VDD (analog power) first, followed by VCC (digital power), and then the clock signal. This ensures proper initialization and prevents latch-up.
  • The CS5381-KZZ outputs data in a 24-bit, two's complement format. The most significant bit (MSB) is the sign bit, and the remaining 23 bits represent the magnitude of the signal.
  • The maximum allowed input voltage for the analog input channels is ±2.5 V, which is the full-scale range of the ADC.

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CS5381-KZZ Overview

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Part Image CS5381-KZZR Cirrus Logic

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Part Image CS5381-KZ Cirrus Logic

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