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CS5523-ASZ - Cirrus Logic

Description: Analog to Digital Converters - ADC 4-Ch 16-Bit Delta Sigma ADC

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CS5523-ASZ - Cirrus Logic PCB footprint - Small Outline Packages - Small Outline Packages - 24L SSOP
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CS5523-ASZ - Cirrus Logic  - 3D model - Small Outline Packages - 24L SSOP
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CS5523-ASZ Details

  • Manufacturer Part Number:

    CS5523-ASZ

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    End Of Life

  • Part Package Code:

    SSOP

  • Package Description:

    SSOP-24

  • Pin Count:

    24

  • HTS Code:

    8542.39.00.30

  • Factory Lead Time:

    18 Weeks

  • Manufacturer:

    Cirrus Logic

  • YTEOL:

    0

  • Analog Input Voltage-Max:

    5.25 V

  • Analog Input Voltage-Min:

    1.8 V

  • Converter Type:

    ADC, DELTA-SIGMA

  • JESD-30 Code:

    R-PDSO-G24

  • JESD-609 Code:

    e3

  • Length:

    8.2 mm

  • Linearity Error-Max (EL):

    0.003%

  • Moisture Sensitivity Level:

    3

  • Number of Analog In Channels:

    4

  • Number of Bits:

    16

  • Number of Functions:

    1

  • Number of Terminals:

    24

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Output Bit Code:

    OFFSET BINARY, 2'S COMPLEMENT BINARY

  • Output Format:

    SERIAL

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    SSOP

  • Package Equivalence Code:

    SSOP24,.3

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, SHRINK PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Qualification Status:

    Not Qualified

  • Sample Rate:

    0.008192 MHz

  • Seated Height-Max:

    2.13 mm

  • Supply Current-Max:

    1.6 mA

  • Supply Voltage-Nom:

    5 V

  • Surface Mount:

    YES

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.65 mm

  • Terminal Position:

    DUAL

  • Width:

    5.3 mm

CS5523-ASZ Frequently Asked Questions (FAQs)

  • Cirrus Logic provides a recommended layout and routing guide in their application note AN215. It's essential to follow these guidelines to ensure optimal performance and minimize noise coupling.
  • To optimize the CS5523-ASZ for low noise and high accuracy, ensure proper PCB layout, use a low-noise power supply, and follow the recommended decoupling and filtering guidelines. Additionally, consider using a shielded enclosure and minimizing digital noise sources near the ADC.
  • The CS5523-ASZ can sample at up to 65,536 samples per second (SPS). However, the actual sampling rate may be limited by the system's clock frequency and the specific application requirements.
  • The CS5523-ASZ has an internal calibration mechanism. To calibrate the device, apply a known input voltage and use the calibration registers to adjust the offset and gain. Refer to the datasheet and application notes for detailed calibration procedures.
  • The CS5523-ASZ has a typical power consumption of 15 mW at 3.3 V and 65,536 SPS. However, power consumption may vary depending on the specific application, sampling rate, and operating conditions.

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CS5523-ASZ Overview

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