DATA RETENTION TIME @ 105 DEGREE CENTIGRADE;2KV ESD AVAILABLE
Clock Frequency-Max (fCLK):
16 MHz
Data Retention Time-Min:
11
Endurance:
10000000000000 Write/Erase Cycles
JESD-30 Code:
R-PDSO-G8
JESD-609 Code:
e3
Length:
4.889 mm
Memory Density:
4096 bit
Memory IC Type:
FRAM
Memory Width:
8
Moisture Sensitivity Level:
3
Number of Functions:
1
Number of Terminals:
8
Number of Words:
512 words
Number of Words Code:
512
Operating Mode:
SYNCHRONOUS
Operating Temperature-Max:
125 °C
Operating Temperature-Min:
-40 °C
Organization:
512X8
Package Body Material:
PLASTIC/EPOXY
Package Code:
SOP
Package Equivalence Code:
SOP8,.25
Package Shape:
RECTANGULAR
Package Style:
SMALL OUTLINE
Parallel/Serial:
SERIAL
Peak Reflow Temperature (Cel):
260
Screening Level:
AEC-Q100
Seated Height-Max:
1.727 mm
Serial Bus Type:
SPI
Standby Current-Max:
0.00002 A
Standby Voltage-Min:
3 V
Supply Current-Max:
0.003 mA
Supply Voltage-Max (Vsup):
3.6 V
Supply Voltage-Min (Vsup):
3 V
Supply Voltage-Nom (Vsup):
3.3 V
Surface Mount:
YES
Technology:
CMOS
Terminal Finish:
Matte Tin (Sn)
Terminal Form:
GULL WING
Terminal Pitch:
1.27 mm
Terminal Position:
DUAL
Time@Peak Reflow Temperature-Max (s):
30
Width:
3.8985 mm
Write Protection:
HARDWARE/SOFTWARE
CY15B004Q-SXE Frequently Asked Questions (FAQs)
The recommended operating voltage range for the CY15B004Q-SXE is 1.7V to 3.6V.
The power-up and power-down sequences for the CY15B004Q-SXE should be handled according to the datasheet recommendations to prevent damage to the device.
The maximum clock frequency supported by the CY15B004Q-SXE is 108 MHz.
The correct timing for the CY15B004Q-SXE's write and read operations can be implemented by following the datasheet's timing diagrams and specifications.
The hardware write protection feature of the CY15B004Q-SXE is used to prevent accidental or unauthorized changes to the device's configuration and data.
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Community Provided
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System Verified
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Community Approved
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CY15B004Q-SXE Overview
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