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DMP2004VK-7 - Diodes Incorporated

Description: Diodes Inc DMP2004VK-7 Dual P-channel MOSFET Transistor, 0.35 A, -20 V, 6-Pin SOT-563

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PCB Footprints
DMP2004VK-7 - Diodes Incorporated PCB footprint - SO Transistor Flat Lead - SO Transistor Flat Lead - SOT-563
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DMP2004VK-7 - Diodes Incorporated  - 3D model - SO Transistor Flat Lead - SOT-563
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DMP2004VK-7 Details

  • Manufacturer Part Number:

    DMP2004VK-7

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    GREEN, PLASTIC PACKAGE-6

  • Pin Count:

    6

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    Diodes Incorporated

  • YTEOL:

    7

  • Additional Feature:

    ESD PROTECTION, LOW THRESHOLD

  • Configuration:

    SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    20 V

  • Drain Current-Max (ID):

    0.53 A

  • Drain-source On Resistance-Max:

    0.9 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    20 pF

  • JESD-30 Code:

    R-PDSO-F6

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    2

  • Number of Terminals:

    6

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    255

  • Polarity/Channel Type:

    P-CHANNEL

  • Power Dissipation-Max (Abs):

    0.4 W

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

DMP2004VK-7 Frequently Asked Questions (FAQs)

  • A good PCB layout for the DMP2004VK-7 should include a solid ground plane, wide power traces, and a thermal relief pattern under the device to facilitate heat dissipation. A minimum of 2oz copper thickness is recommended.
  • To ensure proper biasing, connect the gate to a voltage source through a 1kΩ to 10kΩ resistor, and the source to ground through a 10Ω to 100Ω resistor. The drain should be connected to a load or a voltage source.
  • Handle the device by the body, avoiding touching the leads or die. Store the device in an anti-static bag or wrap it in anti-static material, away from direct sunlight and moisture.
  • Yes, the DMP2004VK-7 is suitable for high-frequency switching applications up to 100 kHz. However, ensure proper PCB layout, decoupling, and bypassing to minimize parasitic inductance and capacitance.
  • Use a voltage regulator or a zener diode to limit the voltage to the recommended maximum rating. Add a current-limiting resistor or a fuse in series with the device to prevent overcurrent.

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DMP2004VK-7 Overview

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