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EP1C6T144C8N - Intel

Description: Altera FPGA EP1C6T144C8N, Cyclone 5980 Cells, 5980 Blocks, 144-Pin TQFP

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EP1C6T144C8N Details

  • Manufacturer Part Number:

    EP1C6T144C8N

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    TQFP-144

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Intel Corporation

  • YTEOL:

    0

  • Clock Frequency-Max:

    275 MHz

  • JESD-30 Code:

    S-PQFP-G144

  • JESD-609 Code:

    e3

  • Length:

    20 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    598

  • Number of Inputs:

    98

  • Number of Logic Cells:

    5980

  • Number of Outputs:

    98

  • Number of Terminals:

    144

  • Operating Temperature-Max:

    85 °C

  • Organization:

    598 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    LFQFP

  • Package Equivalence Code:

    QFP144,.87SQ,20

  • Package Shape:

    SQUARE

  • Package Style:

    FLATPACK, LOW PROFILE, FINE PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1.6 mm

  • Supply Voltage-Max:

    1.575 V

  • Supply Voltage-Min:

    1.425 V

  • Supply Voltage-Nom:

    1.5 V

  • Surface Mount:

    YES

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    20 mm

EP1C6T144C8N Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for the EP1C6T144C8N is -40°C to 100°C.
  • To implement a CDC in the EP1C6T144C8N, use a synchronizer circuit or a FIFO-based CDC to ensure data integrity and prevent metastability issues.
  • The maximum frequency supported by the EP1C6T144C8N is 250 MHz.
  • To optimize power consumption in the EP1C6T144C8N, use power-aware design techniques such as clock gating, voltage scaling, and dynamic voltage and frequency scaling.
  • The EP1C6T144C8N has 144 user I/O pins available.

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EP1C6T144C8N Overview

Use the download button to access the EP1C6T144C8N 3D model. You can still request or build the schematic symbol and PCB footprint by using the respective build or request forms on this page.
To find more CAD model downloads similar to this part, try a partial part number search, like EP1C6, or try a keyword search, such as Field Programmable Gate Arrays

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Part Image EP1C6T144C8 Altera Corporation

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Part Image EP1C6T144C8N Altera Corporation

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Part Image EP1C6T144I8ES Altera Corporation

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Part Image EP1C6T144C8ES Altera Corporation

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Part Image EP1C6T144I8 Altera Corporation

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