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EPF10K30ATC144-3N - Intel

Description: FLEX-10KA® Field Programmable Gate Array (FPGA) IC 102 12288 1728 144-LQFP

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EPF10K30ATC144-3N - Intel PCB footprint - Quad Flat Packages - Quad Flat Packages - 144-Pin TQFP
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EPF10K30ATC144-3N - Intel  - 3D model - Quad Flat Packages - 144-Pin TQFP
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EPF10K30ATC144-3N Details

  • Manufacturer Part Number:

    EPF10K30ATC144-3N

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    TQFP-144

  • HTS Code:

    8542.31.00.55

  • Manufacturer:

    Intel Corporation

  • YTEOL:

    0

  • Additional Feature:

    1728 LOGIC ELEMENTS; 216 LABS

  • Clock Frequency-Max:

    80 MHz

  • JESD-30 Code:

    S-PQFP-G144

  • JESD-609 Code:

    e3

  • Length:

    20 mm

  • Moisture Sensitivity Level:

    3

  • Number of Dedicated Inputs:

    4

  • Number of I/O Lines:

    102

  • Number of Inputs:

    102

  • Number of Logic Cells:

    1728

  • Number of Outputs:

    102

  • Number of Terminals:

    144

  • Operating Temperature-Max:

    70 °C

  • Organization:

    4 DEDICATED INPUTS, 102 I/O

  • Output Function:

    REGISTERED

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    LFQFP

  • Package Equivalence Code:

    QFP144,.63SQ,20

  • Package Shape:

    SQUARE

  • Package Style:

    FLATPACK, LOW PROFILE, FINE PITCH

  • Programmable Logic Type:

    LOADABLE PLD

  • Propagation Delay:

    0.9 ns

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1.6 mm

  • Supply Voltage-Max:

    3.6 V

  • Supply Voltage-Min:

    3 V

  • Supply Voltage-Nom:

    3.3 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Temperature Grade:

    COMMERCIAL

  • Terminal Finish:

    MATTE TIN

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Width:

    20 mm

EPF10K30ATC144-3N Frequently Asked Questions (FAQs)

  • The EPF10K30ATC144-3N has an operating temperature range of -40°C to 100°C.
  • You can implement a clock tree using the FPGA's dedicated clock networks, which include global clock networks and regional clock networks. You can also use the Quartus II software to help you design and implement the clock tree.
  • The EPF10K30ATC144-3N has a maximum clock frequency of 300 MHz.
  • You can configure the FPGA's I/O pins using the Quartus II software, which allows you to specify the I/O standard, voltage, and other parameters for each pin.
  • The EPF10K30ATC144-3N has a typical power consumption of 1.2 W at 1.5 V and 25°C. However, the actual power consumption will depend on the specific design and operating conditions.

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EPF10K30ATC144-3N Overview

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