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EV1320QI - Intel

Description: EV1320QI 2A PowerSoC Source/Sink DDR Memory Termination Converte

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Symbol
EV1320QI - Intel - PCB symbol
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PCB Footprints
EV1320QI - Intel PCB footprint - Quad Flat No-Lead - Quad Flat No-Lead - 16-pin (3mm x 3mm x 0.55mm) QFN
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3D Models
EV1320QI - Intel - 3D model - Quad Flat No-Lead - 16-pin (3mm x 3mm x 0.55mm) QFN
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EV1320QI Details

  • Manufacturer Part Number:

    EV1320QI

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    QFN-16

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.60

  • Manufacturer:

    Intel Corporation

  • YTEOL:

    0

  • Analog IC - Other Type:

    SWITCHING REGULATOR

  • Input Voltage-Max:

    3.465 V

  • Input Voltage-Min:

    3 V

  • Input Voltage-Nom:

    3.3 V

  • JESD-30 Code:

    S-XQCC-N16

  • JESD-609 Code:

    e3

  • Length:

    3 mm

  • Moisture Sensitivity Level:

    3

  • Number of Functions:

    1

  • Number of Terminals:

    16

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Output Voltage-Nom:

    0.75 V

  • Package Body Material:

    UNSPECIFIED

  • Package Code:

    HVQCCN

  • Package Equivalence Code:

    LCC16,.12SQ,20

  • Package Shape:

    SQUARE

  • Package Style:

    CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE

  • Peak Reflow Temperature (Cel):

    260

  • Seated Height-Max:

    0.6 mm

  • Surface Mount:

    YES

  • Switching Frequency-Max:

    750 kHz

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    3 mm

EV1320QI Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane and a separate power plane is recommended. Keep the analog and digital sections separate, and use a common mode filter to reduce EMI.
  • Use a reliable communication protocol like SPI or I2C, and ensure proper signal termination and shielding. Implement error detection and correction mechanisms, such as CRC or checksum, to ensure data integrity.
  • The EV1320QI has a maximum junction temperature of 150°C. Ensure good airflow, use a heat sink if necessary, and avoid blocking the thermal pads. Monitor the device temperature and implement thermal throttling or shutdown if necessary.
  • Sequence the power supplies to ensure the analog and digital sections are powered up and down in the correct order. Use a low-dropout regulator (LDO) or a switching regulator with a low output voltage ripple to ensure stable power supply.
  • Use ESD protection devices, such as TVS diodes or ESD arrays, on the input and output pins to protect against electrostatic discharge. Ensure the PCB layout and component selection minimize the risk of ESD damage.

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EV1320QI Overview

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