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FCMT360N65S3 - onsemi

Description: 700 V @ TJ = 150 oC; Leadless Ultra-thin SMD package; Kelvin contact; Ultra Low Gate Charge (Typ. Qg = 18 nC); Low Effective Output Capacitance (Typ. Coss(eff.) = 173 pF); Optimized Capacitance; Typ. RDS(on) = 310 mΩ; 100% Avalanche Tested; RoHS Compliant; Moisture Sensitivity Level 1 guarantee; Internal Gate Resistance: 1 Ω

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PCB Footprints
FCMT360N65S3 - onsemi PCB footprint - Other - Other - PQFN4 8X8, 2P CASE 483AP ISSUE O
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3D Models
FCMT360N65S3 - onsemi  - 3D model - Other - PQFN4 8X8, 2P CASE 483AP ISSUE O
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FCMT360N65S3 Details

  • Manufacturer Part Number:

    FCMT360N65S3

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    PQFN-4

  • Package Description:

    QFN-4

  • Manufacturer Package Code:

    483AP

  • Country Of Origin:

    Philippines

  • ECCN Code:

    EAR99

  • Manufacturer:

    onsemi

  • YTEOL:

    7

  • Avalanche Energy Rating (Eas):

    40 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    650 V

  • Drain Current-Max (ID):

    10 A

  • Drain-source On Resistance-Max:

    0.36 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    S-PSSO-N4

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    4

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    SQUARE

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    83 W

  • Pulsed Drain Current-Max (IDM):

    25 A

  • Surface Mount:

    YES

  • Terminal Form:

    NO LEAD

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

FCMT360N65S3 Frequently Asked Questions (FAQs)

  • The recommended PCB layout for optimal thermal performance involves using a thermal pad on the bottom of the device, connecting it to a large copper area on the PCB, and using multiple vias to dissipate heat to the other layers. A minimum of 2oz copper thickness is recommended.
  • To ensure reliable operation at high temperatures, it's essential to follow the recommended thermal design guidelines, use a suitable heat sink, and ensure good airflow around the device. Additionally, the device should be operated within the specified junction temperature (Tj) range of -40°C to 150°C.
  • The maximum allowed voltage spike on the drain-source pins is specified as 80V for a duration of less than 10ns. However, it's recommended to limit the voltage spike to 65V or less to ensure reliable operation and prevent damage to the device.
  • To protect the device from electrostatic discharge (ESD), it's recommended to follow proper handling and storage procedures, use ESD-safe materials and equipment, and implement ESD protection circuits in the design, such as TVS diodes or ESD protection arrays.
  • The recommended gate drive voltage is 10V to 15V, and the recommended gate drive current is 1A to 2A. However, the optimal gate drive voltage and current may vary depending on the specific application and switching frequency.

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FCMT360N65S3 Overview

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