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FCP125N65S3R0 - onsemi

Description: 700 V @ TJ = 150 oC; Low Effective Output Capacitance (Typ. Coss(eff.) = 439 pF); Ultra Low Gate Charge (Typ. Qg = 46 nC); Optimized Capacitance; 100% Avalanche Tested; RoHS Compliant; Typ. RDS(on) = 105 mΩ; Internal Gate Resistance: 0.5 Ω

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FCP125N65S3R0 - onsemi PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - TO-220-3LD
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FCP125N65S3R0 - onsemi  - 3D model - Transistor Outline, Vertical - TO-220-3LD
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FCP125N65S3R0 Details

  • Manufacturer Part Number:

    FCP125N65S3R0

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TO-220-3

  • Package Description:

    TO-220, 3 PIN

  • Manufacturer Package Code:

    340AT

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    52 Weeks

  • Date Of Intro:

    2019-01-14

  • Manufacturer:

    onsemi

  • YTEOL:

    6

  • Avalanche Energy Rating (Eas):

    115 mJ

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    650 V

  • Drain Current-Max (ID):

    24 A

  • Drain-source On Resistance-Max:

    0.125 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-220AB

  • JESD-30 Code:

    R-PSFM-T3

  • JESD-609 Code:

    e3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    181 W

  • Pulsed Drain Current-Max (IDM):

    60 A

  • Surface Mount:

    NO

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

FCP125N65S3R0 Frequently Asked Questions (FAQs)

  • The maximum junction temperature of the FCP125N65S3R0 is 150°C, but it's recommended to keep it below 125°C for reliable operation.
  • Proper cooling can be achieved by using a heat sink with a thermal resistance of less than 1°C/W, and ensuring good airflow around the device. A thermal interface material (TIM) can also be used to improve heat transfer.
  • The recommended gate drive voltage for the FCP125N65S3R0 is between 10V and 15V, with a maximum of 20V. A higher gate drive voltage can improve switching performance, but may also increase power consumption.
  • To protect the FCP125N65S3R0 from overvoltage and overcurrent, use a voltage regulator or a voltage clamp to limit the voltage, and a current sense resistor or a current limiter to detect and respond to overcurrent conditions.
  • A good PCB layout for the FCP125N65S3R0 should minimize parasitic inductance and capacitance, keep the gate drive traces short and wide, and use a solid ground plane to reduce electromagnetic interference (EMI).

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FCP125N65S3R0 Overview

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