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FDD4243 - onsemi

Description: Max rDS(on) = 44mΩ at VGS = -10V, ID = -6.7A ; High performance trench technology for extremely low rDS(on) ; Max rDS(on) = 64mΩ at VGS = 4.5V, ID = 5.5A ; RoHS compliant

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FDD4243 - onsemi PCB footprint - Other - Other - DPAK3 (TO−252 3 LD) CASE 369AS ISSUE O_FFW-2
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3D Models
FDD4243 - onsemi  - 3D model - Other - DPAK3 (TO−252 3 LD) CASE 369AS ISSUE O_FFW-2
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FDD4243 Details

  • Manufacturer Part Number:

    FDD4243

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    DPAK-3 / TO-252-3

  • Manufacturer Package Code:

    369AS

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Manufacturer:

    onsemi

  • YTEOL:

    5.4

  • Avalanche Energy Rating (Eas):

    84 mJ

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    40 V

  • Drain Current-Max (ID):

    6.7 A

  • Drain-source On Resistance-Max:

    0.064 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-252

  • JESD-30 Code:

    R-XSSO-G2

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    2

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    UNSPECIFIED

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    P-CHANNEL

  • Power Dissipation-Max (Abs):

    42 W

  • Pulsed Drain Current-Max (IDM):

    60 A

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    GULL WING

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Element Material:

    SILICON

FDD4243 Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. Ensure a minimum of 1 oz copper thickness and a thermal relief pattern under the device.
  • Implement a robust thermal management system, including a heat sink, thermal interface material, and a cooling fan if necessary. Monitor the device's junction temperature and adjust the system design accordingly.
  • A 10-22 μF X7R or X5R ceramic capacitor is recommended, with a voltage rating of 25 V or higher. The capacitor should be placed as close to the VIN pin as possible.
  • Use a shielded enclosure, keep the PCB layout compact, and minimize loop areas. Add EMI filters or common-mode chokes if necessary. Ensure proper grounding and decoupling of the device.
  • The maximum allowed voltage drop is 0.5 V. Ensure that the input voltage is within the recommended range, and the output voltage is within the specified regulation range.

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FDD4243 Overview

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