Description:Max rDS(on) = 23 mΩ at VGS = 10 V, ID = 7 A ; Max rDS(on) = 34 mΩ at VGS = 4.5 V, ID = 5.5 A ; RoHS Compliant ; Low Profile - 1 mm max in Power 33 ; Shielded Gate MOSFET Technology
3.30 X 3.30 MM, ROHS COMPLIANT, POWER 33, MLP, 8 PIN
Manufacturer Package Code:
511DH
Country Of Origin:
Thailand
ECCN Code:
EAR99
Manufacturer:
onsemi
YTEOL:
5.85
Avalanche Energy Rating (Eas):
63 mJ
Case Connection:
DRAIN
Configuration:
SINGLE WITH BUILT-IN DIODE
DS Breakdown Voltage-Min:
100 V
Drain Current-Max (ID):
7 A
Drain-source On Resistance-Max:
0.023 Ω
FET Technology:
METAL-OXIDE SEMICONDUCTOR
Feedback Cap-Max (Crss):
15 pF
JESD-30 Code:
S-PDSO-N8
JESD-609 Code:
e4
Moisture Sensitivity Level:
1
Number of Elements:
1
Number of Terminals:
8
Operating Mode:
ENHANCEMENT MODE
Operating Temperature-Max:
150 °C
Package Body Material:
PLASTIC/EPOXY
Package Shape:
SQUARE
Package Style:
SMALL OUTLINE
Peak Reflow Temperature (Cel):
260
Polarity/Channel Type:
N-CHANNEL
Power Dissipation-Max (Abs):
41 W
Pulsed Drain Current-Max (IDM):
30 A
Qualification Status:
Not Qualified
Surface Mount:
YES
Terminal Finish:
Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal Form:
NO LEAD
Terminal Position:
DUAL
Time@Peak Reflow Temperature-Max (s):
30
Transistor Application:
SWITCHING
Transistor Element Material:
SILICON
Turn-off Time-Max (toff):
44 ns
Turn-on Time-Max (ton):
26 ns
FDMC86102L Frequently Asked Questions (FAQs)
A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. The device should be placed near a thermal pad or heat sink to dissipate heat efficiently.
Ensure proper thermal design, use a heat sink if necessary, and follow the recommended operating conditions. Also, consider using a thermal interface material to improve heat transfer.
The maximum allowed voltage on the input pins is 5.5V, which is the absolute maximum rating. Operating the device above this voltage can cause permanent damage.
Yes, the FDMC86102L is suitable for high-frequency switching applications up to 100 kHz. However, ensure proper PCB layout and decoupling to minimize electromagnetic interference (EMI).
Handle the device by the body or use an ESD wrist strap or mat to prevent static buildup. Use ESD-sensitive handling and storage procedures to prevent damage.
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FDMC86102L Overview
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