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FDS8447 - onsemi

Description: High performance trench technology for extremely low rDS(on) ; RoHS compliant ; Max rDS(on) = 12.3 mΩ at VGS = 4.5 V, ID = 11.4 A ; Low gate charge ; Max rDS(on) = 10.5 mΩ at VGS = 10 V, ID = 12.8 A ; High power and current handling capability

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FDS8447 - onsemi PCB footprint - Small Outline Packages - Small Outline Packages - SOIC 8
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FDS8447 - onsemi  - 3D model - Small Outline Packages - SOIC 8
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FDS8447 Details

  • Manufacturer Part Number:

    FDS8447

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    SOIC-8

  • Package Description:

    SO-8

  • Manufacturer Package Code:

    751EB

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Manufacturer:

    onsemi

  • YTEOL:

    0

  • Avalanche Energy Rating (Eas):

    150 mJ

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    40 V

  • Drain Current-Max (ID):

    12.8 A

  • Drain-source On Resistance-Max:

    0.015 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-PDSO-G8

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    8

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    2.5 W

  • Pulsed Drain Current-Max (IDM):

    50 A

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    GULL WING

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Element Material:

    SILICON

FDS8447 Frequently Asked Questions (FAQs)

  • The FDS8447 can operate from -40°C to 150°C, making it suitable for high-reliability applications.
  • To ensure proper biasing, connect the gate of the FDS8447 to a voltage source through a resistor, and connect the source to a voltage source or ground through a resistor. Refer to the application note for specific biasing recommendations.
  • To minimize parasitic inductance, use a compact PCB layout with short, wide traces. Place the FDS8447 close to the power source, and use a solid ground plane to reduce inductance. Avoid using vias under the device, and keep the drain and source pins as close as possible.
  • Use a voltage regulator or a zener diode to limit the voltage across the FDS8447. Add a current-sensing resistor and a fuse or a current-limiting circuit to prevent overcurrent conditions. Consider using a TVS diode or a varistor for additional protection.
  • A gate drive circuit with a low impedance output, such as a dedicated gate driver IC or a totem pole configuration, is recommended to ensure fast switching times and minimize ringing. The gate drive voltage should be between 5V and 15V.

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FDS8447 Overview

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