The recommended gate resistor value for the FMG50AQ120N6 is typically between 10 ohms to 20 ohms, depending on the specific application and switching frequency. However, it's recommended to consult the application note or contact Sanrex Corporation for more detailed guidance.
Proper thermal management for the FMG50AQ120N6 involves ensuring good heat sink contact, using a suitable thermal interface material, and maintaining a low thermal resistance between the module and heat sink. A heat sink with a thermal resistance of 0.5°C/W or lower is recommended. Additionally, ensure that the module is mounted correctly and the screw torque is within the specified range.
The maximum allowed voltage imbalance between the DC link capacitors for the FMG50AQ120N6 is typically 10% to 20% of the nominal DC link voltage. Exceeding this limit can lead to uneven stress on the IGBTs and reduce the overall reliability of the system. It's recommended to use high-quality DC link capacitors with low equivalent series resistance (ESR) and to implement a voltage balancing circuit if necessary.
Yes, the FMG50AQ120N6 can be used in a parallel configuration, but it's essential to ensure that the modules are matched in terms of their electrical characteristics and thermal performance. Additionally, a master-slave configuration or active current sharing may be necessary to ensure even current distribution and prevent uneven stress on the IGBTs. Consult the application note or contact Sanrex Corporation for more detailed guidance on parallel operation.
The recommended PCB layout and clearance for the FMG50AQ120N6 involve maintaining a minimum creepage distance of 8 mm between the high-voltage and low-voltage nodes, and ensuring that the PCB tracks and pads are designed to handle the high currents and voltages involved. A minimum of 2 mm clearance between the module and any surrounding components is also recommended. Consult the application note or contact Sanrex Corporation for more detailed guidance on PCB layout and clearance.
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