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G3R40MT12K - GeneSiC Semiconductor

Description: MOSFET 1200V 40mO TO-247-4 G3R SiC MOSFET

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G3R40MT12K - GeneSiC Semiconductor - PCB symbol
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PCB Footprints
G3R40MT12K - GeneSiC Semiconductor PCB footprint - Other - Other - TO-247-4_2023
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G3R40MT12K - GeneSiC Semiconductor - 3D model - Other - TO-247-4_2023
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G3R40MT12K Details

  • Manufacturer Part Number:

    G3R40MT12K

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Transferred

  • Country Of Origin:

    USA

  • ECCN Code:

    EAR99

  • Manufacturer:

    GeneSic Semiconductor Inc

  • YTEOL:

    6

  • Avalanche Energy Rating (Eas):

    374 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE AND KELVIN SENSOR

  • DS Breakdown Voltage-Min:

    1200 V

  • Drain Current-Max (ID):

    67 A

  • Drain-source On Resistance-Max:

    0.045 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    7.1 pF

  • JEDEC-95 Code:

    TO-247

  • JESD-30 Code:

    R-PSFM-T4

  • Number of Elements:

    1

  • Number of Terminals:

    4

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    281 W

  • Pulsed Drain Current-Max (IDM):

    150 A

  • Reference Standard:

    IEC-607478-4

  • Surface Mount:

    NO

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON CARBIDE

G3R40MT12K Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a thermal relief pattern and a solid ground plane is recommended. The device should be placed near a thermal pad or a heat sink to ensure good heat dissipation.
  • Ensure that the device is operated within the recommended junction temperature range (TJ) of -40°C to 150°C. Use a heat sink or thermal pad to maintain a low junction temperature, and avoid exceeding the maximum allowed power dissipation.
  • A gate drive circuit with a low impedance output stage and a voltage swing of 10-15V is recommended. A gate resistor (Rg) of 10-20 ohms and a gate capacitor (Cg) of 1-10nF can be used to optimize switching performance.
  • Use a voltage clamp or a transient voltage suppressor (TVS) to protect the device from overvoltage. Implement overcurrent protection using a current sense resistor and a comparator or a dedicated overcurrent protection IC.
  • Use a soldering temperature of 250°C to 260°C, with a soldering time of 3-5 seconds. Avoid using excessive soldering temperatures or times, as this can damage the device.

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G3R40MT12K Overview

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