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G3R45MT17K - GeneSiC Semiconductor

Description: MOSFET 1700V 45mO TO-247-4 G3R SiC MOSFET

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G3R45MT17K Details

  • Manufacturer Part Number:

    G3R45MT17K

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Transferred

  • Country Of Origin:

    USA

  • ECCN Code:

    EAR99

  • Manufacturer:

    GeneSic Semiconductor Inc

  • Avalanche Energy Rating (Eas):

    592 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN CURRENT AND KELVIN SENSOR

  • DS Breakdown Voltage-Min:

    1700 V

  • Drain Current-Max (ID):

    46 A

  • Drain-source On Resistance-Max:

    0.062 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    15.3 pF

  • JEDEC-95 Code:

    TO-247

  • JESD-30 Code:

    R-PSFM-T4

  • Number of Elements:

    1

  • Number of Terminals:

    4

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    284 W

  • Pulsed Drain Current-Max (IDM):

    120 A

  • Reference Standard:

    IEC-60747-8-4

  • Surface Mount:

    NO

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON CARBIDE

G3R45MT17K Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a thermal relief pattern and a solid ground plane is recommended. Ensure a minimum of 1 oz copper thickness and a thermal via array under the device.
  • Implement a robust thermal management system, including a heat sink, thermal interface material, and a cooling fan. Monitor junction temperature (TJ) and adjust the system design accordingly.
  • A non-inverting gate driver with a voltage swing of 10-15V and a current capability of 1-2A is recommended. Ensure the driver is compatible with the device's gate-source voltage rating.
  • Implement a robust overvoltage protection (OVP) circuit and overcurrent protection (OCP) using a sense resistor and a comparator. Ensure the OVP and OCP circuits are designed to respond quickly to fault conditions.
  • Implement ESD protection using TVS diodes or ESD arrays at the input and output pins. Ensure the ESD protection devices are rated for the maximum voltage and current of the application.

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G3R45MT17K Overview

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