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ICE5LP4K-SWG36ITR - Lattice Semiconductor

Description: FPGA iCE40 Ultra Family 3520 Cells 40nm Technology 1.2V 36-Pin WLCSP T/R

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ICE5LP4K-SWG36ITR - Lattice Semiconductor PCB footprint - BGA - BGA - 36-Ball WLCS Package Option 1: iCE40 Ultra
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3D Models
ICE5LP4K-SWG36ITR - Lattice Semiconductor  - 3D model - BGA - 36-Ball WLCS Package Option 1: iCE40 Ultra
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ICE5LP4K-SWG36ITR Details

  • Manufacturer Part Number:

    ICE5LP4K-SWG36ITR

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Country Of Origin:

    Taiwan

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.31.00.01

  • Manufacturer:

    Lattice Semiconductor Corporation

  • YTEOL:

    7.6

  • Combinatorial Delay of a CLB-Max:

    9 ns

  • JESD-30 Code:

    S-PBGA-B36

  • Length:

    2.078 mm

  • Moisture Sensitivity Level:

    1

  • Number of CLBs:

    440

  • Number of Inputs:

    26

  • Number of Logic Cells:

    3520

  • Number of Outputs:

    26

  • Number of Terminals:

    36

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    440 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    VFBGA

  • Package Equivalence Code:

    BGA36,6X6,14

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY, VERY THIN PROFILE, FINE PITCH

  • Packing Method:

    TR

  • Peak Reflow Temperature (Cel):

    260

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Seated Height-Max:

    0.491 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Form:

    BALL

  • Terminal Pitch:

    0.35 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    2.078 mm

ICE5LP4K-SWG36ITR Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the ICE5LP4K-SWG36ITR is dependent on the specific application and design. However, the device is designed to operate at frequencies up to 200 MHz.
  • To implement a CDC in the ICE5LP4K-SWG36ITR, you can use the device's built-in clock domain crossing circuits or implement a synchronous CDC using the device's clock management units. Lattice Semiconductor provides guidelines and IP cores to facilitate CDC implementation.
  • The power consumption of the ICE5LP4K-SWG36ITR depends on the specific application, operating frequency, and voltage supply. However, the device has a typical static power consumption of 50 mW and a dynamic power consumption of 100 mW/MHz.
  • Yes, the ICE5LP4K-SWG36ITR is suitable for high-reliability applications. It has been designed and tested to meet the requirements of various industries, including aerospace, defense, and industrial control systems.
  • The ICE5LP4K-SWG36ITR has several security features, including a secure boot mechanism, encrypted bitstream storage, and a hardware-based root of trust. These features help protect the device and its contents from unauthorized access and tampering.

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ICE5LP4K-SWG36ITR Overview

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Part Image ICE5LP4K-SWG36ITR50 Lattice Semiconductor Corporation

Field Programmable Gate Array, 3520-Cell, CMOS, PBGA36