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IPN50R950CE - Infineon

Description: ID=4.3A, IDpuls=12.8A, Mounting=SMT, Temperature =-40°C, Ptot=5W, Package=SOT-223, QG=10.5nC, Qgd=5.9nC, RDS=950mΩ, RthJA=75K/W, VDS=500V, VGS=2.5V,3.5V

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IPN50R950CE - Infineon PCB footprint - Other - Other - IPN50R950CE
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IPN50R950CE Details

  • Manufacturer Part Number:

    IPN50R950CE

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    SOT-223, 3 PIN

  • ECCN Code:

    EAR99

  • Date Of Intro:

    2016-06-13

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    0

  • Avalanche Energy Rating (Eas):

    68 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    500 V

  • Drain Current-Max (ID):

    6.6 A

  • Drain-source On Resistance-Max:

    0.95 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-261

  • JESD-30 Code:

    R-PDSO-G3

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -40 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    5 W

  • Pulsed Drain Current-Max (IDM):

    12.8 A

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

IPN50R950CE Frequently Asked Questions (FAQs)

  • The maximum junction temperature of the IPN50R950CE is 175°C, as specified in the datasheet. However, it's recommended to keep the junction temperature below 150°C for reliable operation and to prevent thermal runaway.
  • Proper cooling of the IPN50R950CE is crucial to prevent overheating. Ensure good thermal contact between the device and the heat sink, and use a heat sink with a thermal resistance of less than 1°C/W. Also, make sure to follow the recommended PCB layout and thermal design guidelines.
  • The recommended gate drive voltage for the IPN50R950CE is between 10V and 15V. However, the optimal gate drive voltage may vary depending on the specific application and switching frequency. It's recommended to consult the datasheet and application notes for more information.
  • Yes, the IPN50R950CE can be used in a parallel configuration to increase the current handling capability. However, it's essential to ensure that the devices are properly matched and that the gate drive signals are synchronized to prevent uneven current sharing.
  • The maximum allowed dv/dt for the IPN50R950CE is 10V/ns. Exceeding this limit can cause the device to malfunction or fail. It's recommended to use a gate driver with a built-in dv/dt limiter or to add an external dv/dt filter to prevent excessive voltage transients.

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IPN50R950CE Overview

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