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IPU95R750P7AKMA1 - Infineon

Description: N-Channel 950 V 9A (Tc) 73W (Tc) Through Hole PG-TO251-3

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IPU95R750P7AKMA1 - Infineon PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - PG-TO251-3_2023
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3D Models
IPU95R750P7AKMA1 - Infineon  - 3D model - Transistor Outline, Vertical - PG-TO251-3_2023
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IPU95R750P7AKMA1 Details

  • Manufacturer Part Number:

    IPU95R750P7AKMA1

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Country Of Origin:

    Germany, Mainland China

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    17 Weeks

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    6

  • Avalanche Energy Rating (Eas):

    18 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    950 V

  • Drain Current-Max (ID):

    9 A

  • Drain-source On Resistance-Max:

    0.75 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-251

  • JESD-30 Code:

    R-PSIP-T3

  • JESD-609 Code:

    e3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    IN-LINE

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    73 W

  • Pulsed Drain Current-Max (IDM):

    27 A

  • Surface Mount:

    NO

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

IPU95R750P7AKMA1 Frequently Asked Questions (FAQs)

  • Infineon provides a recommended PCB layout in their application note AN2014-03, which includes guidelines for thermal vias, copper thickness, and component placement to ensure optimal thermal performance.
  • Infineon recommends using their EiceDRIVER gate driver family, specifically the 1EDC or 2EDC series, which are designed to work with the IPU95R750P7AKMA1. The selection of the gate driver depends on the specific application requirements, such as voltage, current, and package type.
  • The maximum allowed junction temperature for the IPU95R750P7AKMA1 is 150°C, as specified in the datasheet. However, it's recommended to operate the device at a lower temperature to ensure reliability and longevity.
  • Infineon provides guidelines for EMC design in their application note AN2014-04, which includes recommendations for PCB layout, component selection, and shielding to minimize electromagnetic interference.
  • For high-power applications, Infineon recommends using a heat sink with a thermal interface material (TIM) and a fan for forced air cooling. The heat sink should be designed to meet the thermal requirements of the application, and the TIM should be selected based on its thermal conductivity and reliability.

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