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LDL112PV18R - STMicroelectronics

Description: 1.2 A low quiescent current LDO with reverse current protection

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LDL112PV18R - STMicroelectronics PCB footprint - Small Outline No-lead - Small Outline No-lead - DFN6 (3x3 mm) package
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LDL112PV18R - STMicroelectronics  - 3D model - Small Outline No-lead - DFN6 (3x3 mm) package
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LDL112PV18R Details

  • Manufacturer Part Number:

    LDL112PV18R

  • Brand Name:

    STMicroelectronics

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    DFN-6

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.60

  • Factory Lead Time:

    16 Weeks

  • Manufacturer:

    STMicroelectronics

  • YTEOL:

    8

  • Adjustability:

    FIXED

  • Dropout Voltage1-Nom:

    0.5 V

  • Input Voltage Absolute-Max:

    7 V

  • Input Voltage-Max:

    5.5 V

  • Input Voltage-Min:

    2.3 V

  • JESD-30 Code:

    S-PDSO-N6

  • Length:

    3 mm

  • Line Regulation-Max:

    0.00576%

  • Load Regulation-Max:

    0.03%

  • Number of Functions:

    1

  • Number of Outputs:

    1

  • Number of Terminals:

    6

  • Operating Temperature TJ-Max:

    125 °C

  • Operating Temperature TJ-Min:

    -40 °C

  • Output Current1-Max:

    1.2 A

  • Output Voltage1-Max:

    1.854 V

  • Output Voltage1-Min:

    1.746 V

  • Output Voltage1-Nom:

    1.8 V

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    HVSON

  • Package Shape:

    SQUARE

  • Package Style:

    SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE

  • Packing Method:

    TR

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Regulator Type:

    FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR

  • Seated Height-Max:

    1 mm

  • Surface Mount:

    YES

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    0.95 mm

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Voltage Tolerance-Max:

    3%

  • Width:

    3 mm

LDL112PV18R Frequently Asked Questions (FAQs)

  • A good PCB layout for the LDL112PV18R involves keeping the input and output tracks as short as possible, using a solid ground plane, and placing decoupling capacitors close to the device. A 4-layer PCB with a dedicated power plane and a solid ground plane is recommended.
  • To ensure proper biasing, connect the EN pin to a voltage source (e.g., VCC) through a resistor (e.g., 1 kΩ) and a capacitor (e.g., 100 nF) in series. This provides a stable voltage reference and noise filtering.
  • The recommended input capacitor value for the LDL112PV18R is 10 μF to 22 μF, with a voltage rating of at least 25 V. A low-ESR capacitor (e.g., X5R or X7R dielectric) is recommended to minimize power losses.
  • To protect the LDL112PV18R from overvoltage, use a voltage regulator or a zener diode to limit the input voltage to 18 V. For overcurrent protection, add a fuse or a current-limiting resistor in series with the input.
  • The thermal derating curve for the LDL112PV18R is typically 0.5% per °C above 25°C. This means that for every 1°C increase in temperature above 25°C, the device's output power rating decreases by 0.5%.

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LDL112PV18R Overview

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About STMicroelectronics

STMicroelectronics (ST) is a global semiconductor company that designs, manufactures, and markets a broad range of integrated circuits (ICs), discrete devices, and other electronic components. STMicroelectronics offers a diverse portfolio of semiconductor products covering a wide range of applications and industries. Their product categories include microcontrollers, analog and mixed-signal ICs, MEMS (Micro-Electro-Mechanical Systems) sensors, power management ICs, RF (Radio Frequency) transceivers, aut

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