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LFE2M100E-7FN900C - Lattice Semiconductor

Description: FPGA - Field Programmable Gate Array 95K LUTs 416 I/O Memory DSP 1.2V 7SPD

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LFE2M100E-7FN900C Details

  • Manufacturer Part Number:

    LFE2M100E-7FN900C

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    BGA

  • Package Description:

    FPBGA-900

  • Pin Count:

    900

  • Country Of Origin:

    Malaysia, Philippines, Taiwan

  • ECCN Code:

    3A991.D

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Lattice Semiconductor Corporation

  • YTEOL:

    9

  • Clock Frequency-Max:

    420 MHz

  • Combinatorial Delay of a CLB-Max:

    0.304 ns

  • JESD-30 Code:

    S-PBGA-B900

  • JESD-609 Code:

    e1

  • Length:

    31 mm

  • Moisture Sensitivity Level:

    3

  • Number of Inputs:

    416

  • Number of Logic Cells:

    100000

  • Number of Outputs:

    416

  • Number of Terminals:

    900

  • Operating Temperature-Max:

    85 °C

  • Organization:

    11875 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA900,30X30,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    250

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.6 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    40

  • Width:

    31 mm

LFE2M100E-7FN900C Frequently Asked Questions (FAQs)

  • The LFE2M100E-7FN900C has an industrial temperature range of -40°C to 100°C, making it suitable for a wide range of applications.
  • The LFE2M100E-7FN900C has a dedicated clock management system, which includes phase-locked loops (PLLs) and clock buffers. You can use the Lattice Diamond design software to implement a clock tree and configure the PLLs to meet your specific clocking requirements.
  • The power consumption of the LFE2M100E-7FN900C depends on the specific application and usage. However, according to the datasheet, the typical static power consumption is around 100 mW, and the dynamic power consumption can range from 100 mW to 1 W, depending on the clock frequency and activity level.
  • Yes, the LFE2M100E-7FN900C has high-speed I/O capabilities, including PCIe Gen2 and SATA II interfaces, making it suitable for high-speed applications.
  • The LFE2M100E-7FN900C can be programmed using the Lattice Diamond design software, which provides a comprehensive development environment for designing, implementing, and testing FPGA-based systems. You can also use the Lattice iCEcube2 software for programming and configuration.

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LFE2M100E-7FN900C Overview

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Part Image LFE2M100E-7F900C Lattice Semiconductor Corporation

Field Programmable Gate Array, 11875 CLBS, 420MHz, 100000-Cell, PBGA900