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LFE2M20E-5F256I - Lattice Semiconductor

Description: 19K LUTS, 140 I/O, SERDES, MEM

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LFE2M20E-5F256I - Lattice Semiconductor PCB footprint - BGA - BGA - 256-FPBGA 17x17
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LFE2M20E-5F256I - Lattice Semiconductor  - 3D model - BGA - 256-FPBGA 17x17
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LFE2M20E-5F256I Details

  • Manufacturer Part Number:

    LFE2M20E-5F256I

  • Pbfree Code:

    No

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    BGA

  • Package Description:

    FPBGA-256

  • Pin Count:

    256

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Lattice Semiconductor Corporation

  • YTEOL:

    0

  • Clock Frequency-Max:

    311 MHz

  • Combinatorial Delay of a CLB-Max:

    0.358 ns

  • JESD-30 Code:

    S-PBGA-B256

  • JESD-609 Code:

    e0

  • Length:

    17 mm

  • Moisture Sensitivity Level:

    3

  • Number of Inputs:

    140

  • Number of Logic Cells:

    20000

  • Number of Outputs:

    140

  • Number of Terminals:

    256

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    2375 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA256,16X16,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    225

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.1 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Tin/Lead (Sn63Pb37)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    17 mm

LFE2M20E-5F256I Frequently Asked Questions (FAQs)

  • The LFE2M20E-5F256I FPGA has an industrial temperature range of -40°C to 100°C, making it suitable for use in a wide range of applications.
  • Lattice provides a Clock Domain Crossing (CDC) IP core that can be used to implement CDC in the LFE2M20E-5F256I FPGA. This IP core is available in the Lattice IPexpress tool.
  • The power consumption of the LFE2M20E-5F256I FPGA depends on the specific application and usage. However, according to the datasheet, the typical static power consumption is around 100mW, and the dynamic power consumption is around 200mW at 50MHz.
  • Yes, the LFE2M20E-5F256I FPGA has high-speed I/Os that support interfaces like PCIe and SATA. However, the maximum speed supported depends on the specific interface and the FPGA's operating conditions.
  • The LFE2M20E-5F256I FPGA can be programmed and configured using Lattice's iCEcube2 development software, which provides a comprehensive design environment for FPGA design, implementation, and verification.

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LFE2M20E-5F256I Overview

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Part Image LFE2M20E-5FN256I Lattice Semiconductor Corporation

Field Programmable Gate Array, 2375 CLBS, 311MHz, 20000-Cell, PBGA256