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LFXP2-17E-6F484C - Lattice Semiconductor

Description: FPGA LatticeXP2 Family 17000 Cells 90nm Technology 1.2V 484-Pin FBGA

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PCB Footprints
LFXP2-17E-6F484C - Lattice Semiconductor PCB footprint - BGA - BGA - 484-Ball fpBGA
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3D Models
LFXP2-17E-6F484C - Lattice Semiconductor  - 3D model - BGA - 484-Ball fpBGA
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LFXP2-17E-6F484C Details

  • Manufacturer Part Number:

    LFXP2-17E-6F484C

  • Pbfree Code:

    No

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    BGA

  • Package Description:

    FBGA-484

  • Pin Count:

    484

  • ECCN Code:

    3A991.D

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Lattice Semiconductor Corporation

  • YTEOL:

    0

  • Clock Frequency-Max:

    435 MHz

  • Combinatorial Delay of a CLB-Max:

    0.399 ns

  • JESD-30 Code:

    S-PBGA-B484

  • JESD-609 Code:

    e0

  • Length:

    23 mm

  • Moisture Sensitivity Level:

    3

  • Number of Inputs:

    358

  • Number of Logic Cells:

    17000

  • Number of Outputs:

    358

  • Number of Terminals:

    484

  • Operating Temperature-Max:

    85 °C

  • Organization:

    2125 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA484,22X22,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    225

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.6 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Lead (Sn/Pb)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    23 mm

LFXP2-17E-6F484C Frequently Asked Questions (FAQs)

  • The LFXP2-17E-6F484C has an industrial temperature range of -40°C to 100°C, and a commercial temperature range of 0°C to 70°C.
  • The LFXP2-17E-6F484C has a dedicated clock tree network that can be implemented using the Lattice Diamond design software. The clock tree can be configured to provide low-skew, low-jitter clock signals to the FPGA's logic elements.
  • The maximum frequency that can be achieved with the LFXP2-17E-6F484C depends on the specific design and implementation. However, the FPGA is capable of supporting clock frequencies up to 500 MHz.
  • The I/O banks of the LFXP2-17E-6F484C can be configured using the Lattice Diamond design software. The I/O banks can be set to operate at different voltage levels, and can be configured to support various I/O standards such as LVCMOS, LVTTL, and SSTL.
  • The power consumption of the LFXP2-17E-6F484C depends on the specific design and implementation. However, the FPGA has a typical static power consumption of 100 mW, and a dynamic power consumption that scales with the clock frequency and design activity.

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LFXP2-17E-6F484C Overview

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Part Image LFXP2-17E-6FN484I Lattice Semiconductor Corporation

Field Programmable Gate Array, 2125 CLBS, 435MHz, 17000-Cell, CMOS, PBGA484

Part Image LFXP2-17E-6FN484C Lattice Semiconductor Corporation

Field Programmable Gate Array, 2125 CLBS, 435MHz, 17000-Cell, CMOS, PBGA484

Part Image LFXP2-17E-6F484I Lattice Semiconductor Corporation

Field Programmable Gate Array, 2125 CLBS, 435MHz, 17000-Cell, CMOS, PBGA484