ALSO OPERATES AT 3V MINIMUM SUPPLY AT 24 MHZ; ADC IS 18-CH 10-BIT IN MEMORY EXPANSION AND UP MODE
Address Bus Width:
24
Bit Size:
32
Boundary Scan:
NO
Clock Frequency-Max:
32 MHz
DAC Channels:
YES
DMA Channels:
YES
External Data Bus Width:
16
JESD-30 Code:
S-PQFP-G144
Length:
20 mm
Number of I/O Lines:
124
Number of Terminals:
144
On Chip Program ROM Width:
8
Operating Temperature-Max:
85 °C
Operating Temperature-Min:
-20 °C
PWM Channels:
YES
Package Body Material:
PLASTIC/EPOXY
Package Code:
LFQFP
Package Shape:
SQUARE
Package Style:
FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Cel):
NOT SPECIFIED
RAM (bytes):
49152
ROM (words):
786432
ROM Programmability:
FLASH
Seated Height-Max:
1.7 mm
Speed:
32 MHz
Supply Voltage-Max:
5.5 V
Supply Voltage-Min:
5 V
Supply Voltage-Nom:
5 V
Surface Mount:
YES
Technology:
CMOS
Temperature Grade:
OTHER
Terminal Form:
GULL WING
Terminal Pitch:
0.5 mm
Terminal Position:
QUAD
Time@Peak Reflow Temperature-Max (s):
NOT SPECIFIED
Width:
20 mm
uPs/uCs/Peripheral ICs Type:
MICROCONTROLLER
M3087BFKGP#U3 Frequently Asked Questions (FAQs)
Renesas provides a recommended PCB layout guide for the M3087BFKGP#U3, which includes thermal vias, heat sinks, and component placement guidelines to ensure optimal thermal performance. Contact Renesas support for the layout guide.
Renesas provides a Secure Boot and Firmware Encryption Guide for the M3087BFKGP#U3, which outlines the steps to implement secure boot and firmware encryption using the device's built-in security features. Contact Renesas support for the guide.
The internal oscillator of the M3087BFKGP#U3 has a typical accuracy of ±1.5% at room temperature. To improve accuracy, use an external crystal oscillator or a high-precision clock source. Additionally, calibrate the internal oscillator using the device's built-in calibration feature.
To optimize power consumption, use the M3087BFKGP#U3's power-saving modes, such as Sleep and Stop modes. Also, optimize your code to minimize CPU usage, use low-power peripherals, and adjust the clock frequency to the lowest required value.
For the M3087BFKGP#U3, use the following JTAG settings: TCK frequency: 10 MHz, TMS and TDI signal levels: 3.3 V, and TDO signal level: 3.3 V. Ensure that the JTAG interface is properly terminated and use a JTAG adapter compatible with the device.
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Community Provided
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System Verified
This model has been reviewed by community users.
Community Approved
Sponsored
M3087BFKGP#U3 Overview
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