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MCP3564RT-E/ST - Microchip

Description: Analog to Digital Converters - ADC 24-bit delta-sigma ADC w/Vref, Quad channel, 3V

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PCB Footprints
MCP3564RT-E/ST - Microchip PCB footprint - Small Outline Packages - Small Outline Packages - Plastic Thin Shrink Small Outline (TSSOP), 6.4 x 6.4 x 1 mm, 20-Lead
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3D Models
MCP3564RT-E/ST - Microchip  - 3D model - Small Outline Packages - Plastic Thin Shrink Small Outline (TSSOP), 6.4 x 6.4 x 1 mm, 20-Lead
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MCP3564RT-E/ST Details

  • Manufacturer Part Number:

    MCP3564RT-E/ST

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Pin Count:

    20

  • Manufacturer Package Code:

    TSSOP-20

  • Country Of Origin:

    Philippines

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.01

  • Factory Lead Time:

    13 Weeks

  • Manufacturer:

    Microchip Technology Inc

  • YTEOL:

    19

  • Analog Input Voltage-Max:

    3.6 V

  • Analog Input Voltage-Min:

    -2.7 V

  • Converter Type:

    ADC, DELTA-SIGMA

  • JESD-30 Code:

    R-PDSO-G20

  • JESD-609 Code:

    e3

  • Length:

    6.5 mm

  • Linearity Error-Max (EL):

    0.0032%

  • Number of Analog In Channels:

    8

  • Number of Bits:

    24

  • Number of Functions:

    1

  • Number of Terminals:

    20

  • Operating Temperature-Max:

    125 °C

  • Operating Temperature-Min:

    -40 °C

  • Output Bit Code:

    2'S COMPLEMENT BINARY

  • Output Format:

    SERIAL

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    TSSOP

  • Package Equivalence Code:

    TSSOP20,.25

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

  • Sample Rate:

    0.1536 MHz

  • Sample and Hold / Track and Hold:

    SAMPLE

  • Seated Height-Max:

    1.2 mm

  • Supply Current-Max:

    2.5 mA

  • Supply Voltage-Nom:

    3.3 V

  • Surface Mount:

    YES

  • Temperature Grade:

    AUTOMOTIVE

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.65 mm

  • Terminal Position:

    DUAL

  • Width:

    4.4 mm

MCP3564RT-E/ST Frequently Asked Questions (FAQs)

  • Microchip recommends a 4-layer PCB with a solid ground plane, and to keep analog and digital signals separate. Use short, direct traces for analog signals and avoid crossing digital signals over analog signals. Also, use a common mode filter capacitor (e.g., 10nF) between the analog input and ground to reduce noise.
  • Calibration involves adjusting the internal gain and offset registers to compensate for device variations. Use the built-in calibration registers and follow the calibration procedure outlined in the datasheet. You can also use external calibration methods, such as using a precision voltage reference and a calibration resistor network.
  • Power up the device in the following sequence: VDD, AVDD, and then CLKIN. Ensure that VDD and AVDD are powered up simultaneously, and that CLKIN is powered up last. This sequence prevents damage to the device and ensures correct operation.
  • Use external protection diodes (e.g., 1N4148) to clamp the analog input voltage to the supply rails. You can also use a voltage limiter circuit or a resistive divider network to limit the input voltage. Additionally, consider using a voltage supervisor or a reset IC to monitor the supply voltage and reset the device in case of an undervoltage condition.
  • The maximum sampling rate of the MCP3564RT-E/ST is 94.4 kSPS. As the sampling rate increases, the device's power consumption also increases. To minimize power consumption, use the lowest sampling rate required for your application, and consider using the device's power-down modes during idle periods.

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MCP3564RT-E/ST Overview

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About Microchip

Microchip Technology Inc. is a leading manufacturer of microcontrollers and semiconductor devices for a wide range of applications in the aerospace, automotive, consumer electronics, industrial, and medical industries. Alongside a comprehensive product portfolio, Microchip Technology Inc. also provides easy-to-use development tools that enable engineers to create optimal designs quickly with minimal iterations to reduce risk while lowering total system costs to market. Headquartered in Chandler, Arizona, th

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