MT40A4G4SA-062E:F - Micron
Description: VDD = VDDQ = 1.2V ά60mV On-die, internal, adjustable VREFDQ generation 1.2V pseudo open-drain I/O TC maximum up to 95ιC 64ms, 8192-cycle refresh up to 85ιC 32ms, 8192-cycle refresh at >85ιC to 95ιC 16 internal banks (x4, x8): 4 groups of 4 banks each 8 internal banks (x16): 2 groups of 4 banks each 8n-bit prefetch architecture Programmable data strobe preambles Data strobe preamble training Command/Address latency (CAL) Multipurpose register READ and WRITE capability
