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NCP562SQ35T1G - onsemi

Description: Obsolete - LDO Regulator, 80 mA, Ultra-Low Iq

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NCP562SQ35T1G - onsemi PCB footprint - Other - Other - SC−82AB CASE 419C−02 ISSUE F
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NCP562SQ35T1G Details

  • Manufacturer Part Number:

    NCP562SQ35T1G

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    SC-82AB 4 LEAD 2.0x1.25x0.95 mm, max with leads is 2.2x2.4x1.1mm

  • Pin Count:

    4

  • Manufacturer Package Code:

    419C-02

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.60

  • Manufacturer:

    onsemi

  • YTEOL:

    0

  • Adjustability:

    FIXED

  • Dropout Voltage1-Max:

    0.35 V

  • Dropout Voltage1-Nom:

    0.19 V

  • Input Voltage Absolute-Max:

    6 V

  • Input Voltage-Max:

    6 V

  • Input Voltage-Min:

    4.5 V

  • JESD-30 Code:

    R-PDSO-G4

  • JESD-609 Code:

    e3

  • Length:

    2 mm

  • Line Regulation-Max:

    0.02%

  • Load Regulation-Max:

    0.04%

  • Moisture Sensitivity Level:

    1

  • Number of Functions:

    1

  • Number of Outputs:

    1

  • Number of Terminals:

    4

  • Operating Temperature TJ-Max:

    150 °C

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Output Current1-Max:

    0.08 A

  • Output Voltage1-Max:

    3.57 V

  • Output Voltage1-Min:

    3.43 V

  • Output Voltage1-Nom:

    3.5 V

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    TSOP

  • Package Equivalence Code:

    SOT-343R

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, THIN PROFILE

  • Peak Reflow Temperature (Cel):

    260

  • Qualification Status:

    Not Qualified

  • Regulator Type:

    FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR

  • Screening Level:

    AEC-Q100

  • Seated Height-Max:

    1.1 mm

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Terminal Finish:

    MATTE TIN

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    1.3 mm

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Voltage Tolerance-Max:

    2%

  • Width:

    1.25 mm

NCP562SQ35T1G Frequently Asked Questions (FAQs)

  • The recommended PCB layout for optimal thermal performance involves placing thermal vias under the IC, using a solid ground plane, and keeping the thermal traces as short and wide as possible. A 4-layer PCB with a dedicated thermal layer is also recommended.
  • To ensure the stability of the output voltage, it is recommended to use a minimum output capacitance of 10uF, with an ESR of less than 1 ohm. Additionally, the output voltage should be decoupled from the input voltage using a 1uF ceramic capacitor.
  • The maximum input voltage that can be applied to the NCP562SQ35T1G is 18V. Exceeding this voltage may cause damage to the device.
  • The power dissipation of the NCP562SQ35T1G can be calculated using the formula: Pd = (Vin - Vout) x Iout + (Vin x Iq), where Vin is the input voltage, Vout is the output voltage, Iout is the output current, and Iq is the quiescent current.
  • The recommended input capacitor value is 1uF to 10uF, with a type of X5R or X7R ceramic capacitor. This helps to filter out input noise and ensure stable operation.

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