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NST3904DP6T5G - onsemi

Description: hFE, 100-300; Low VCE(sat), <0.4 V; Simplifies Circuit Design; Reduces Board Space; Reduces Component Count; This is a Pb-Free Device

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PCB Footprints
NST3904DP6T5G - onsemi PCB footprint - SO Transistor Flat Lead - SO Transistor Flat Lead - SOT−963 1.00x1.00x0.37, 0.35P CASE 527AD ISSUE F
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3D Models
NST3904DP6T5G - onsemi  - 3D model - SO Transistor Flat Lead - SOT−963 1.00x1.00x0.37, 0.35P CASE 527AD ISSUE F
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NST3904DP6T5G Details

  • Manufacturer Part Number:

    NST3904DP6T5G

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    SOT-963 1x1, 0.35P

  • Pin Count:

    6

  • Manufacturer Package Code:

    527AD

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    8 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    7

  • Collector Current-Max (IC):

    0.2 A

  • Collector-Emitter Voltage-Max:

    40 V

  • Configuration:

    SEPARATE, 2 ELEMENTS

  • DC Current Gain-Min (hFE):

    30

  • JESD-30 Code:

    R-PDSO-F6

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    2

  • Number of Terminals:

    6

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    NPN

  • Power Dissipation-Max (Abs):

    0.42 W

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    AMPLIFIER

  • Transistor Element Material:

    SILICON

  • Transition Frequency-Nom (fT):

    200 MHz

  • Turn-off Time-Max (toff):

    325 ns

  • Turn-on Time-Max (ton):

    70 ns

NST3904DP6T5G Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. The device should be placed near a thermal pad or heat sink to dissipate heat efficiently.
  • Ensure proper heat sinking, use a thermal interface material, and follow the recommended PCB layout. Also, consider derating the device's power handling at high temperatures.
  • The SOA is not explicitly stated in the datasheet. However, it can be estimated by considering the device's thermal resistance, maximum junction temperature, and power handling. Consult with onsemi's application engineers for guidance.
  • Yes, the device is suitable for switching regulator applications. However, ensure that the device is operated within its safe operating area, and consider the device's switching characteristics, such as rise and fall times, and the impact of parasitic inductance.
  • Follow proper ESD handling procedures, such as using an ESD wrist strap or mat, and ensure that the device is stored in an ESD-protective package. Implement ESD protection circuits, such as TVS diodes, in the system design.

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NST3904DP6T5G Overview

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