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NTHL040N120M3S - onsemi

Description: Halide Free and RoHS Compliant; Excellent FOM [ = Rdson * Eoss ]; Ultra Low Gate Charge (QG(tot) = 75 nC); High Speed Switching with Low Capacitance (Coss = 80 pF); 15V to 18V Gate Drive; New M3S technology: 40 mohm RDS(ON) with low Eon and Eoff losses; 100% Avalanche Tested

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NTHL040N120M3S - onsemi PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - ***TO-247-3LD CASE 340CH ISSUE A
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NTHL040N120M3S - onsemi  - 3D model - Transistor Outline, Vertical - ***TO-247-3LD CASE 340CH ISSUE A
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NTHL040N120M3S Details

  • Manufacturer Part Number:

    NTHL040N120M3S

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TO-247-3LD

  • Manufacturer Package Code:

    340CX

  • ECCN Code:

    EAR99

  • Manufacturer:

    onsemi

  • YTEOL:

    6

  • Avalanche Energy Rating (Eas):

    143 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    1200 V

  • Drain Current-Max (ID):

    54 A

  • Drain-source On Resistance-Max:

    0.054 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    7 pF

  • JEDEC-95 Code:

    TO-247

  • JESD-30 Code:

    R-PSFM-T3

  • JESD-609 Code:

    e3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    231 W

  • Pulsed Drain Current-Max (IDM):

    134 A

  • Surface Mount:

    NO

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON CARBIDE

NTHL040N120M3S Frequently Asked Questions (FAQs)

  • The recommended PCB layout for optimal thermal performance involves using a thermal pad on the bottom of the device, connecting it to a large copper area on the PCB, and using multiple vias to dissipate heat to the other layers. A minimum of 2oz copper thickness is recommended.
  • To ensure the device is properly biased, make sure to follow the recommended biasing circuitry and voltage levels as specified in the datasheet. Additionally, ensure that the gate-source voltage (Vgs) is within the recommended range and that the device is operated within the safe operating area (SOA).
  • Operating the device at high temperatures can lead to reduced performance, increased power losses, and decreased lifespan. It's essential to ensure that the device is operated within the recommended temperature range (TJ ≤ 150°C) and that proper thermal management is implemented to prevent overheating.
  • To protect the device from ESD, follow proper handling and storage procedures, use ESD-safe materials and equipment, and ensure that the device is properly grounded during assembly and testing. Additionally, consider implementing ESD protection circuits or devices in the system design.
  • Paralleling multiple devices can increase current capability, but it also increases the complexity of the system design. Ensure that each device is properly matched, and that the gate drive and biasing circuits are designed to handle the increased current. Additionally, consider the impact on thermal management and ensure that the system is designed to handle the increased heat generation.

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NTHL040N120M3S Overview

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