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NTMFS0D55N03CGT1G - onsemi

Description: Wide SOA; Ultra Low RDS(on); Advanced SO8-FL 5x6mm Package Technology

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NTMFS0D55N03CGT1G - onsemi PCB footprint - Other - Other - DFN5 5x6, 1.27P (SO−8FL) CASE 506EZ ISSUE A
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NTMFS0D55N03CGT1G - onsemi  - 3D model - Other - DFN5 5x6, 1.27P (SO−8FL) CASE 506EZ ISSUE A
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NTMFS0D55N03CGT1G Details

  • Manufacturer Part Number:

    NTMFS0D55N03CGT1G

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    DFN5 5x6, 1.27P (SO−8FL)

  • Manufacturer Package Code:

    506EZ

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    15 Weeks

  • Date Of Intro:

    2020-04-14

  • Manufacturer:

    onsemi

  • YTEOL:

    5.3

  • Additional Feature:

    ULTRA LOW RESISTANCE

  • Avalanche Energy Rating (Eas):

    1346 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    30 V

  • Drain Current-Max (ID):

    462 A

  • Drain-source On Resistance-Max:

    0.00058 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    222 pF

  • JESD-30 Code:

    R-PDSO-F5

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    5

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    199 W

  • Pulsed Drain Current-Max (IDM):

    900 A

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

NTMFS0D55N03CGT1G Frequently Asked Questions (FAQs)

  • The recommended PCB footprint for NTMFS0D55N03CGT1G is a 3.3mm x 3.3mm QFN package with a 0.5mm pitch. The datasheet provides a recommended land pattern and solder mask design guidelines.
  • To ensure the stability of the output voltage, it is recommended to use a minimum output capacitance of 10uF with an ESR of 1ohm or less, and to place the capacitor as close to the output pin as possible.
  • The maximum input voltage that NTMFS0D55N03CGT1G can handle is 18V. Exceeding this voltage may cause damage to the device.
  • The power dissipation of NTMFS0D55N03CGT1G can be calculated using the formula: Pd = (Vin - Vout) x Iout + (Vin x Iq), where Vin is the input voltage, Vout is the output voltage, Iout is the output current, and Iq is the quiescent current.
  • Yes, NTMFS0D55N03CGT1G is AEC-Q100 qualified, making it suitable for automotive applications. However, it is recommended to consult the datasheet and application notes for specific requirements and guidelines.

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NTMFS0D55N03CGT1G Overview

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