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NTPF450N80S3Z - onsemi

Description: 900 V @ TJ = 150 °C; Ultra Low Gate Charge (Typ. Qg = 19.3 nC); Low Stored Energy in Output Capacitance (Eoss = 2.2 µJ @ 400 V); Optimized Capacitance; ESD Improved Capability with Zener Diode; Typ. RDS(on) = 380 mΩ; RoHS Compliant; 100% Avalanche Tested; Internal Gate Resistance: 4.0 Ω

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PCB Footprints
NTPF450N80S3Z - onsemi PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - TO-220 FULLPAK CASE 221D-03
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NTPF450N80S3Z - onsemi  - 3D model - Transistor Outline, Vertical - TO-220 FULLPAK CASE 221D-03
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NTPF450N80S3Z Details

  • Manufacturer Part Number:

    NTPF450N80S3Z

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TO-220-3 FullPak

  • Manufacturer Package Code:

    221D-03

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    18 Weeks

  • Date Of Intro:

    2019-12-20

  • Manufacturer:

    onsemi

  • YTEOL:

    6

  • Case Connection:

    ISOLATED

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    800 V

  • Drain Current-Max (ID):

    13 A

  • Drain-source On Resistance-Max:

    0.45 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-220AB

  • JESD-30 Code:

    R-PSFM-T3

  • JESD-609 Code:

    e3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Pulsed Drain Current-Max (IDM):

    32.5 A

  • Surface Mount:

    NO

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

NTPF450N80S3Z Frequently Asked Questions (FAQs)

  • The recommended PCB layout for optimal thermal performance involves using a thermal pad on the bottom of the device, connecting it to a large copper area on the PCB, and using multiple vias to dissipate heat. A minimum of 2oz copper thickness is recommended.
  • To ensure reliable operation at high temperatures, it's essential to follow the recommended thermal design guidelines, use a suitable heat sink, and ensure good airflow around the device. Additionally, derating the device's power handling capability at high temperatures is recommended.
  • The maximum allowed voltage transient on the drain-source pins is typically limited to 10-20% above the maximum rated voltage (Vdss) for a short duration (e.g., 100ns). Exceeding this limit can cause damage to the device.
  • To protect the device from ESD, it's essential to follow proper handling and storage procedures, use ESD-safe materials and tools, and implement ESD protection circuits in the design, such as TVS diodes or ESD protection arrays.
  • The recommended gate drive voltage is typically between 10-15V, and the recommended gate drive current is dependent on the specific application and switching frequency. A general guideline is to use a gate drive current of 1-2A for optimal switching performance.

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NTPF450N80S3Z Overview

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