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NVMFD020N06CT1G - onsemi

Description: Mosfet Array 60V 8A (Ta), 27A (Tc) 3.1W (Ta), 31W (Tc) Surface Mount 8-DFN (5x6) Dual Flag (SO8FL-Dual)

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NVMFD020N06CT1G Details

  • Manufacturer Part Number:

    NVMFD020N06CT1G

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    SO-8FL Dual / DFN-8

  • Package Description:

    SO-8FL, DFN-8

  • Manufacturer Package Code:

    506BT

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    14 Weeks

  • Date Of Intro:

    2020-01-22

  • Manufacturer:

    onsemi

  • YTEOL:

    5

  • Avalanche Energy Rating (Eas):

    16 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    60 V

  • Drain Current-Max (ID):

    27 A

  • Drain-source On Resistance-Max:

    0.0203 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    4.9 pF

  • JESD-30 Code:

    R-PDSO-F8

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    2

  • Number of Terminals:

    8

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    31 W

  • Pulsed Drain Current-Max (IDM):

    98 A

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Element Material:

    SILICON

NVMFD020N06CT1G Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for NVMFD020N06CT1G is -55°C to 150°C.
  • To ensure proper biasing during startup, make sure to apply a voltage to the gate pin (Vgs) before applying a voltage to the drain pin (Vds). This will help prevent unwanted turn-on or oscillation.
  • For optimal performance, it is recommended to use a PCB layout that minimizes parasitic inductance and resistance. This can be achieved by using a compact layout, keeping the drain and source pins close together, and using a solid ground plane.
  • Yes, the NVMFD020N06CT1G is suitable for high-frequency switching applications up to 1 MHz. However, it's essential to consider the device's switching characteristics, such as rise and fall times, and ensure that the application's requirements are within the device's capabilities.
  • To prevent electrostatic discharge (ESD) damage, it is recommended to use ESD protection devices, such as TVS diodes or ESD protection arrays, on the input and output pins of the NVMFD020N06CT1G. Additionally, follow proper handling and storage procedures to minimize the risk of ESD damage.

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