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NVMFD5C672NLWFT1G - onsemi

Description: Small Footprint (5x6 mm); Low rDS(on); Low QG and Capacitance; NVMFD5C672NLWF − Wettable Flank Option for Enhanced Optical Inspection; AEC−Q101 Qualified and PPAP Capable; RoHS Compliant

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NVMFD5C672NLWFT1G - onsemi - PCB symbol
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PCB Footprints
NVMFD5C672NLWFT1G - onsemi PCB footprint - Other - Other - DFN8 5x6 (SO8FL) CASE 506BT
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3D Models
NVMFD5C672NLWFT1G - onsemi - 3D model - Other - DFN8 5x6 (SO8FL) CASE 506BT
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NVMFD5C672NLWFT1G Details

  • Manufacturer Part Number:

    NVMFD5C672NLWFT1G

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    SO-8FL Dual / DFN-8

  • Manufacturer Package Code:

    506BT

  • Country Of Origin:

    Malaysia

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    14 Weeks

  • Date Of Intro:

    2017-08-03

  • Manufacturer:

    onsemi

  • YTEOL:

    5

  • Avalanche Energy Rating (Eas):

    66 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    60 V

  • Drain-source On Resistance-Max:

    0.0168 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-PDSO-F6

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    2

  • Number of Terminals:

    6

  • Operating Mode:

    ENHANCEMENT MODE

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Pulsed Drain Current-Max (IDM):

    146 A

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Element Material:

    SILICON

NVMFD5C672NLWFT1G Frequently Asked Questions (FAQs)

  • The recommended PCB footprint for NVMFD5C672NLWFT1G is a WLCC-30 package with a 3.3mm x 3.3mm body size and 0.5mm pitch. The datasheet provides a recommended land pattern and solder mask design guidelines.
  • The power-up sequence for NVMFD5C672NLWFT1G is critical. It is recommended to power up the device in the following sequence: VCC, then VPP, and finally the clock signal. This ensures proper device initialization and prevents latch-up.
  • The maximum operating frequency for NVMFD5C672NLWFT1G is 166 MHz. However, the actual operating frequency may be limited by the system design and the quality of the clock signal.
  • To implement a reliable write operation for NVMFD5C672NLWFT1G, ensure that the write cycle is completed within the specified time (typically 10ms). Also, verify that the write voltage (VPP) is within the recommended range (12V ± 0.5V) and that the device is properly powered up.
  • The recommended storage temperature range for NVMFD5C672NLWFT1G is -40°C to +125°C. Storing the device outside this range may affect its reliability and performance.

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NVMFD5C672NLWFT1G Overview

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