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PDTC114EU,115 - Nexperia

Description: NXP, PDTC114EU,115 NPN Digital Transistor, 100 mA 50 V 10 kΩ, Ratio Of 1, 3-Pin UMT

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PDTC114EU,115 - Nexperia PCB footprint - Other - Other - PDTC114EU,115-3
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PDTC114EU,115 - Nexperia  - 3D model - Other - PDTC114EU,115-3
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PDTC114EU,115 Details

  • Manufacturer Part Number:

    PDTC114EU,115

  • Brand Name:

    Nexperia

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    SC-70

  • Package Description:

    SC-70, 3 PIN

  • Pin Count:

    3

  • Manufacturer Package Code:

    SOT323

  • Country Of Origin:

    Malaysia

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    8 Weeks

  • Date Of Intro:

    1997-09-01

  • Manufacturer:

    Nexperia

  • YTEOL:

    7

  • Additional Feature:

    BUILT IN BIAS RESISTANCE RATIO IS 1

  • Collector Current-Max (IC):

    0.1 A

  • Collector-Emitter Voltage-Max:

    50 V

  • Configuration:

    SINGLE WITH BUILT-IN RESISTOR

  • DC Current Gain-Min (hFE):

    30

  • JESD-30 Code:

    R-PDSO-G3

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    NPN

  • Qualification Status:

    Not Qualified

  • Reference Standard:

    IEC-60134

  • Surface Mount:

    YES

  • Terminal Finish:

    TIN

  • Terminal Form:

    GULL WING

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

  • Transition Frequency-Nom (fT):

    230 MHz

PDTC114EU,115 Frequently Asked Questions (FAQs)

  • The recommended PCB footprint for PDTC114EU,115 is a standard SOT23 package with a minimum pad size of 0.8 mm x 0.8 mm and a thermal pad size of 2.5 mm x 2.5 mm.
  • To ensure reliable operation in high-temperature environments, ensure that the device is operated within the recommended junction temperature range (TJ) of -40°C to 150°C, and provide adequate heat sinking and thermal management.
  • The maximum allowed voltage on the input pins of PDTC114EU,115 is 6.5 V, exceeding which may cause damage to the device.
  • Yes, PDTC114EU,115 can be used in switching regulator applications, but ensure that the device is operated within the recommended frequency range (up to 100 kHz) and that the output voltage is properly filtered to prevent oscillations.
  • The power dissipation of PDTC114EU,115 can be calculated using the formula: Pd = (VIN x IIN) + (VOUT x IOUT), where VIN is the input voltage, IIN is the input current, VOUT is the output voltage, and IOUT is the output current.

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PDTC114EU,115 Overview

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About Nexperia

Nexperia is a leading global player in the semiconductor industry. Specializing in essential electronic components, Nexperia offers a diverse range of products including discrete components, MOSFETs, logic ICs, and analog ICs. These components are integral to a multitude of applications across automotive, industrial, consumer electronics, and computing sectors, where reliability, performance, and efficiency are paramount.

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