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PSMN2R2-25YLC,115 - Nexperia

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PSMN2R2-25YLC,115 Details

  • Manufacturer Part Number:

    PSMN2R2-25YLC,115

  • Brand Name:

    Nexperia

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    SOIC

  • Package Description:

    SO8, LFPAK-4

  • Pin Count:

    4

  • Manufacturer Package Code:

    SOT669

  • Country Of Origin:

    Malaysia, Philippines

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    16 Weeks

  • Manufacturer:

    Nexperia

  • YTEOL:

    5.3

  • Additional Feature:

    HIGH RELIABILITY

  • Avalanche Energy Rating (Eas):

    60 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    25 V

  • Drain Current-Max (ID):

    100 A

  • Drain-source On Resistance-Max:

    0.00315 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    216 pF

  • JEDEC-95 Code:

    MO-235

  • JESD-30 Code:

    R-PSSO-G4

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    4

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    106 W

  • Pulsed Drain Current-Max (IDM):

    636 A

  • Reference Standard:

    IEC-60134

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    40

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

PSMN2R2-25YLC,115 Frequently Asked Questions (FAQs)

  • The recommended PCB footprint for PSMN2R2-25YLC,115 is a standard SOT23 package with a 1.3mm x 1.3mm pad size and a 0.5mm x 0.5mm thermal pad.
  • To ensure reliable operation of PSMN2R2-25YLC,115 in high-temperature environments, it is recommended to follow proper thermal design and layout guidelines, including providing adequate heat sinking and thermal relief.
  • The maximum allowed voltage on the gate of PSMN2R2-25YLC,115 is ±20V, but it is recommended to limit the gate voltage to ±15V for reliable operation.
  • Yes, PSMN2R2-25YLC,115 is suitable for high-frequency switching applications up to 100 kHz, but it is recommended to follow proper layout and decoupling guidelines to minimize parasitic inductance and capacitance.
  • It is recommended to follow proper ESD handling and storage procedures for PSMN2R2-25YLC,115, including using ESD-safe packaging and handling tools, and implementing ESD protection circuits in the application.

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PSMN2R2-25YLC,115 Overview

Use the download button to access the PSMN2R2-25YLC,115 3D model. You can still request or build the schematic symbol and PCB footprint by using the respective build or request forms on this page.
To find more CAD model downloads similar to this part, try a partial part number search, like PSMN2, or try a keyword search, such as Power Field-Effect Transistors

About Nexperia

Nexperia is a leading global player in the semiconductor industry. Specializing in essential electronic components, Nexperia offers a diverse range of products including discrete components, MOSFETs, logic ICs, and analog ICs. These components are integral to a multitude of applications across automotive, industrial, consumer electronics, and computing sectors, where reliability, performance, and efficiency are paramount.

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