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R5F104LGAFB#10 - Renesas Electronics

Description: RL78/G14 microcontrollers balance the industry's lowest level of consumption current (CPU: 66 μA/MHz, standby (STOP): 240 nA) and a high calculation performance of51.2 DMIPS (32 MHz). The built-in high-function timer supports three-phase motor control using three-phase complementary PWM output. They have an on-chip oscillator, data flash, A/D and D/A converters, comparator, and more. Built-in safety features (function that detects illegal operation of hardware) enable support for the household appliance saf

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R5F104LGAFB#10 - Renesas Electronics PCB footprint - Quad Flat Packages - Quad Flat Packages - PLQP0064KB-C
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R5F104LGAFB#10 Details

  • Manufacturer Part Number:

    R5F104LGAFB#10

  • Brand Name:

    Renesas

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    LQFP

  • Package Description:

    LFQFP-64

  • Pin Count:

    64

  • Manufacturer Package Code:

    PLQP0064KB

  • HTS Code:

    8542.31.00.20

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    Renesas Electronics Corporation

  • YTEOL:

    10

  • Has ADC:

    YES

  • Additional Feature:

    OPERATES AT 1.6 V MINIMUM SUPPLY AT 4 MHz

  • Bit Size:

    16

  • Boundary Scan:

    NO

  • CPU Family:

    RL78

  • Clock Frequency-Max:

    20 MHz

  • DAC Channels:

    YES

  • DMA Channels:

    NO

  • Format:

    FIXED POINT

  • Integrated Cache:

    NO

  • JESD-30 Code:

    S-PQFP-G64

  • Length:

    10 mm

  • Low Power Mode:

    YES

  • Moisture Sensitivity Level:

    3

  • Number of External Interrupts:

    12

  • Number of I/O Lines:

    58

  • Number of Serial I/Os:

    3

  • Number of Terminals:

    64

  • Number of Timers:

    9

  • On Chip Data RAM Width:

    8

  • On Chip Program ROM Width:

    8

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • PWM Channels:

    YES

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    LFQFP

  • Package Equivalence Code:

    QFP64,.47SQ,20

  • Package Shape:

    SQUARE

  • Package Style:

    FLATPACK, LOW PROFILE, FINE PITCH

  • RAM (bytes):

    16384

  • ROM (words):

    131072

  • ROM Programmability:

    FLASH

  • Seated Height-Max:

    1.6 mm

  • Speed:

    32 MHz

  • Supply Current-Max:

    10.2 mA

  • Supply Voltage-Max:

    5.5 V

  • Supply Voltage-Min:

    3 V

  • Supply Voltage-Nom:

    3 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Width:

    10 mm

  • uPs/uCs/Peripheral ICs Type:

    MICROCONTROLLER

R5F104LGAFB#10 Frequently Asked Questions (FAQs)

  • The recommended power-on sequence is to apply VCC first, followed by VDD, and then the clock signal. This ensures that the internal voltage regulators and clock circuits are properly initialized.
  • During reset, the JTAG interface should be tri-stated to prevent any unwanted data from being written to the device. This can be done by asserting the TRST signal or by using an external JTAG controller that supports reset detection.
  • The maximum allowed clock skew is typically specified as 1-2 clock cycles, depending on the specific peripheral and operating frequency. It's essential to ensure that the clock signals are properly synchronized to prevent data corruption or system instability.
  • To implement a WDT reset, connect the WDT output to the reset pin (RST) of the R5F104LGAFB#10. When the WDT times out, it will assert the reset signal, which will reset the device. Make sure to configure the WDT correctly and use a suitable timeout period for your application.
  • A minimum of 0.1uF ceramic capacitors should be used for decoupling, with one capacitor per power pin (VCC and VDD). Additional capacitors may be required depending on the specific application and PCB layout. It's essential to follow the recommended decoupling guidelines to ensure proper device operation and reduce noise susceptibility.

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R5F104LGAFB#10 Overview

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