R7F702300AEBBB-C - Renesas Electronics
Description: CPU0/1/2/3 core RH850G4MH2: 4 units [For U2A-EVA and U2A16 Only] 2 units [For U2A8 and U2A6 Only] (for high-speed operation and control) CPU0/1/2/3 instruction cache memory (for Code Flash) 16 KB CPU0/1/2/3 data buffer (for Code Flash) 4 lines (256 bit/line) Minimum CPU0/1/2/3 instruction execution time 2.5ns (during internal 400 MHz operation) General CPU0/1/2/3 registers Thirty-two 32-bit registers
