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SI5317D-C-GM - Skyworks

Description: Standard Clock Oscillators Any-frequency jitter attenuating clock

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PCB Footprints
SI5317D-C-GM - Skyworks PCB footprint - Quad Flat No-Lead - Quad Flat No-Lead - 36-Pin QFN
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3D Models
SI5317D-C-GM - Skyworks  - 3D model - Quad Flat No-Lead - 36-Pin QFN
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SI5317D-C-GM Details

  • Manufacturer Part Number:

    SI5317D-C-GM

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    6 X 6 MM, ROHS COMPLIANT, MO-220VJJD, QFN-36

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.60

  • Manufacturer:

    Skyworks Solutions Inc

  • YTEOL:

    7.1

  • Additional Feature:

    CAN ALSO OPERATES AT 2.5V, 3.3V SUPPLY

  • JESD-30 Code:

    S-XQCC-N36

  • Length:

    6 mm

  • Number of Terminals:

    36

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Output Clock Frequency-Max:

    100 MHz

  • Package Body Material:

    UNSPECIFIED

  • Package Code:

    HVQCCN

  • Package Equivalence Code:

    LCC36,.25SQ,20

  • Package Shape:

    SQUARE

  • Package Style:

    CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE

  • Primary Clock/Crystal Frequency-Nom:

    711 MHz

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    0.95 mm

  • Supply Current-Max:

    279 mA

  • Supply Voltage-Max:

    1.89 V

  • Supply Voltage-Min:

    1.71 V

  • Supply Voltage-Nom:

    1.8 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Width:

    6 mm

  • uPs/uCs/Peripheral ICs Type:

    CLOCK GENERATOR, OTHER

SI5317D-C-GM Frequently Asked Questions (FAQs)

  • The recommended PCB layout involves keeping the device away from high-current carrying traces, using a solid ground plane, and placing thermal vias under the device. For thermal management, a heat sink or thermal pad is recommended to keep the junction temperature below 125°C.
  • Optimization involves using a combination of simulation tools and empirical methods to find the optimal impedance matching networks. Skyworks provides a reference design and simulation models to aid in the design process.
  • Skyworks recommends using a reflow soldering process with a peak temperature of 260°C. The device should be handled with care to prevent damage, and a no-clean flux should be used to prevent residue buildup.
  • To ensure EMC and reduce EMI, use a shielded enclosure, keep the device away from antennas and high-frequency circuits, and use filtering and shielding techniques to minimize radiation.
  • The SI5317D-C-GM has undergone rigorous qualification tests, including temperature cycling, humidity testing, and electrical stress testing, to ensure reliability and compliance with industry standards.

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SI5317D-C-GM Overview

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