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SI7111EDN-T1-GE3 - Vishay

Description: VISHAY - SI7111EDN-T1-GE3 - MOSFET, P-CH, -30V, -60A, POWERPAK1212

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SI7111EDN-T1-GE3 - Vishay PCB footprint - Other - Other - PowerPAK-1212-8-SINGLE
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SI7111EDN-T1-GE3 - Vishay  - 3D model - Other - PowerPAK-1212-8-SINGLE
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SI7111EDN-T1-GE3 Details

  • Manufacturer Part Number:

    SI7111EDN-T1-GE3

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    19 Weeks

  • Date Of Intro:

    2016-09-25

  • Manufacturer:

    Vishay Intertechnologies

  • YTEOL:

    5.3

  • Avalanche Energy Rating (Eas):

    20 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    30 V

  • Drain Current-Max (ID):

    49.3 A

  • Drain-source On Resistance-Max:

    0.00855 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    395 pF

  • JESD-30 Code:

    S-PDSO-F5

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    5

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    SQUARE

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    P-CHANNEL

  • Power Dissipation-Max (Abs):

    52 W

  • Pulsed Drain Current-Max (IDM):

    150 A

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

  • Turn-off Time-Max (toff):

    306 ns

  • Turn-on Time-Max (ton):

    130 ns

SI7111EDN-T1-GE3 Frequently Asked Questions (FAQs)

  • The recommended PCB footprint for the SI7111EDN-T1-GE3 is a standard SOT23-6 package with a 1.3mm x 1.3mm body size and a 0.5mm pitch. The datasheet provides a recommended land pattern and soldering guidelines.
  • To ensure reliability in high-temperature applications, follow the recommended operating conditions, derate the power dissipation according to the thermal derating curve, and ensure good thermal design and heat sinking. Additionally, consider using a thermally conductive material and a heat sink to dissipate heat efficiently.
  • The maximum allowed voltage on the gate of the SI7111EDN-T1-GE3 is 20V. Exceeding this voltage may damage the device. It is recommended to use a gate voltage limiter or a voltage clamp to prevent overvoltage conditions.
  • To protect the SI7111EDN-T1-GE3 from ESD, follow proper handling and storage procedures, use ESD-protective packaging, and implement ESD protection circuits in the design. Additionally, ensure that the device is handled and assembled in an ESD-controlled environment.
  • The recommended gate drive circuit for the SI7111EDN-T1-GE3 is a non-inverting gate driver with a resistive load and a voltage source. The gate driver should be capable of providing a high current pulse to quickly charge and discharge the gate capacitance. A recommended gate driver IC is the UCC37322 or similar.

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SI7111EDN-T1-GE3 Overview

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