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SI7469DP-T1-E3 - Vishay

Description: MOSFET -80V Vds 20V Vgs PowerPAK SO-8

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SI7469DP-T1-E3 - Vishay PCB footprint - Other - Other - SI7469DP-T1-E3-2
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SI7469DP-T1-E3 - Vishay  - 3D model - Other - SI7469DP-T1-E3-2
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SI7469DP-T1-E3 Details

  • Manufacturer Part Number:

    SI7469DP-T1-E3

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Not Recommended

  • Country Of Origin:

    Israel

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    Vishay Intertechnologies

  • YTEOL:

    3

  • Avalanche Energy Rating (Eas):

    100 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    80 V

  • Drain Current-Max (ID):

    10.2 A

  • Drain-source On Resistance-Max:

    0.025 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-PDSO-C5

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    5

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    P-CHANNEL

  • Power Dissipation-Max (Abs):

    83 W

  • Pulsed Drain Current-Max (IDM):

    40 A

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    C BEND

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

SI7469DP-T1-E3 Frequently Asked Questions (FAQs)

  • The recommended PCB footprint for the SI7469DP-T1-E3 is a standard SOT23-6 package with a 1.6mm x 2.9mm body size. A minimum pad size of 1.1mm x 1.1mm is recommended for reliable soldering.
  • To ensure proper biasing, connect the input pin (VIN) to a stable voltage source between 2.5V and 5.5V. The enable pin (EN) should be tied to VIN or a logic signal for proper operation. Additionally, decouple the input with a 1uF ceramic capacitor to minimize noise and ensure stable operation.
  • The SI7469DP-T1-E3 has an operating temperature range of -40°C to 125°C. However, it's recommended to operate the device within a temperature range of -20°C to 85°C for optimal performance and reliability.
  • To prevent electrostatic discharge (ESD) damage, handle the SI7469DP-T1-E3 with an ESD wrist strap or mat. Ensure the workspace is ESD-protected, and avoid touching the device's pins or leads with bare hands.
  • Store the SI7469DP-T1-E3 in a dry, cool place with a temperature range of 5°C to 30°C and relative humidity below 60%. Avoid exposing the device to direct sunlight, moisture, or extreme temperatures.

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SI7469DP-T1-E3 Overview

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Power Field-Effect Transistor, 10.2A I(D), 80V, 0.025ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET

Part Image SI7469DP-T1-E3 Vishay Siliconix

Power Field-Effect Transistor, 10.2A I(D), 80V, 0.025ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET