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SIR5802DP-T1-RE3 - Vishay

Description: N-Channel 80 V 33.6A (Ta), 137.5A (Tc) 6.25W (Ta), 104W (Tc) Surface Mount PowerPAK® SO-8

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SIR5802DP-T1-RE3 - Vishay PCB footprint - Other - Other - SIR5802DP-T1-RE3-1
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SIR5802DP-T1-RE3 - Vishay  - 3D model - Other - SIR5802DP-T1-RE3-1
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SIR5802DP-T1-RE3 Details

  • Manufacturer Part Number:

    SIR5802DP-T1-RE3

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    SOP-8

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    29 Weeks

  • Manufacturer:

    Vishay Intertechnologies

  • YTEOL:

    6

  • Avalanche Energy Rating (Eas):

    101.2 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    80 V

  • Drain Current-Max (ID):

    137.5 A

  • Drain-source On Resistance-Max:

    0.004 Ω

  • FET Technology:

    TRENCH MOSFET

  • Feedback Cap-Max (Crss):

    11 pF

  • JESD-30 Code:

    R-PDSO-F8

  • Number of Elements:

    1

  • Number of Terminals:

    8

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    104 W

  • Pulsed Drain Current-Max (IDM):

    300 A

  • Surface Mount:

    YES

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

  • Turn-off Time-Max (toff):

    76 ns

  • Turn-on Time-Max (ton):

    78 ns

SIR5802DP-T1-RE3 Frequently Asked Questions (FAQs)

  • A recommended PCB layout for optimal thermal performance would be to use a 2-layer or 4-layer board with a solid ground plane on the bottom layer, and to place thermal vias under the device to dissipate heat efficiently.
  • To ensure proper soldering, use a soldering iron with a temperature range of 250°C to 260°C, and apply a small amount of solder paste to the pads. Avoid applying excessive force or pressure during soldering, and inspect the joints for any signs of cold soldering or bridging.
  • The recommended input capacitor is a 10uF to 22uF X7R or X5R ceramic capacitor, and the recommended output capacitor is a 10uF to 22uF X7R or X5R ceramic capacitor with an ESR of less than 10mΩ.
  • To calculate the power dissipation, use the formula Pd = (Vin - Vout) x Iout. To calculate the junction temperature, use the formula Tj = Ta + (Pd x Rthja), where Ta is the ambient temperature, Pd is the power dissipation, and Rthja is the junction-to-ambient thermal resistance.
  • To prevent ESD damage, handle the device in an ESD-protected environment, wear an ESD wrist strap or use an ESD mat, and avoid touching the device's pins or leads. Also, use ESD-protected packaging and storage materials.

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SIR5802DP-T1-RE3 Overview

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