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SPW55N80C3 - Infineon

Description: Infineon SPW55N80C3 MOSFET Transistor

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SPW55N80C3 - Infineon PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - IGW50N60H3FKSA1
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3D Models
SPW55N80C3 - Infineon  - 3D model - Transistor Outline, Vertical - IGW50N60H3FKSA1
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SPW55N80C3 Details

  • Manufacturer Part Number:

    SPW55N80C3

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TO-247

  • Pin Count:

    3

  • ECCN Code:

    EAR99

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    6

  • Avalanche Energy Rating (Eas):

    2150 mJ

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    800 V

  • Drain-source On Resistance-Max:

    0.085 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-247

  • JESD-30 Code:

    R-PSFM-T3

  • JESD-609 Code:

    e3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    ENHANCEMENT MODE

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Polarity/Channel Type:

    N-CHANNEL

  • Pulsed Drain Current-Max (IDM):

    150 A

  • Surface Mount:

    NO

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

SPW55N80C3 Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for the SPW55N80C3 is -40°C to 150°C.
  • To ensure reliability, follow the recommended operating conditions, use a suitable heat sink, and ensure proper thermal management. Additionally, consider using a gate driver with a high current capability and a low voltage drop.
  • The recommended gate resistance for the SPW55N80C3 is between 10 ohms and 100 ohms, depending on the specific application and switching frequency.
  • Yes, the SPW55N80C3 can be used in a parallel configuration to increase power handling. However, it's essential to ensure that the devices are properly matched, and the gate drive and layout are designed to minimize differences in switching times and voltage drops.
  • To minimize EMI, use a layout with a solid ground plane, keep the power loops small, and use shielding or filtering if necessary. Additionally, consider using a gate driver with built-in EMI filtering or a common-mode choke.

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SPW55N80C3 Overview

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