Part Image

SSM6P69NU,LF - Toshiba

Description: Small Signal MOSFET P-ch x 2 VDSS=-20V, VGSS=+6/-12V, ID=-4.0A, in UDFN6 package

Download SSM6P69NU,LF Model
Schematic
symbols
Schematic symbol is unavailable for download
PCB
footprints
PCB footprint is unavailable for download
3D
models
3D model is unavailable for download
PCB Footprints
SSM6P69NU,LF - Toshiba PCB footprint - Other - Other - UDFN6_2021
click to zoom
3D Models
SSM6P69NU,LF - Toshiba  - 3D model - Other - UDFN6_2021
click to zoom

SSM6P69NU,LF Details

  • Manufacturer Part Number:

    SSM6P69NU,LF

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    UDFN6, 6 PIN

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    Toshiba America Electronic Components

  • YTEOL:

    5.4

  • Case Connection:

    DRAIN

  • Configuration:

    SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    20 V

  • Drain Current-Max (ID):

    4 A

  • Drain-source On Resistance-Max:

    0.045 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    76 pF

  • JESD-30 Code:

    S-PDSO-N6

  • Number of Elements:

    2

  • Number of Terminals:

    6

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    SQUARE

  • Package Style:

    SMALL OUTLINE

  • Polarity/Channel Type:

    P-CHANNEL

  • Power Dissipation-Max (Abs):

    1 W

  • Pulsed Drain Current-Max (IDM):

    16 A

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    YES

  • Terminal Form:

    NO LEAD

  • Terminal Position:

    DUAL

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

SSM6P69NU,LF Frequently Asked Questions (FAQs)

  • Toshiba recommends a PCB layout with a thermal pad connected to a large copper area on the bottom layer, and multiple vias to dissipate heat. A minimum of 2oz copper thickness is recommended.
  • Ensure that the device is operated within the recommended temperature range (TJ = -40°C to 150°C). Use a heat sink or thermal interface material to reduce thermal resistance. Monitor the device's junction temperature and adjust the operating conditions accordingly.
  • The maximum allowed voltage on the input pins is 80V, which is the absolute maximum rating. However, for reliable operation, it is recommended to keep the input voltage below 60V to ensure safe operating area (SOA) compliance.
  • Yes, the SSM6P69NU,LF is qualified for automotive and high-reliability applications. It meets the requirements of AEC-Q101 and is PPAP capable. However, additional testing and validation may be required for specific applications.
  • The SSM6P69NU,LF has built-in ESD protection, but it is still recommended to follow proper ESD handling procedures during assembly and testing. Use an ESD wrist strap or mat, and ensure that the device is stored in an ESD-safe environment.

Trust Checks

This model has been built in collaboration with the manufacturer.
Manufacturer Collaborated
This model has been verified by system checks.
System Verified
This model has been reviewed by community users.
Community Approved
Sponsored

SSM6P69NU,LF Overview

Use the download button to access the SSM6P69NU,LF schematic symbol, PCB footprint, and 3D model.
To find more CAD model downloads similar to this part, try a partial part number search, like SSM6P, or try a keyword search, such as Power Field-Effect Transistors

Parts related to SSM6P69NU,LF

Showing 0 results