STM32F765VIT6 - STMicroelectronics

STM32F765VIT6 Details

• Manufacturer Part Number:

  STM32F765VIT6

• Brand Name:

  STMicroelectronics

• Rohs Code:

  Yes

• Part Life Cycle Code:

  Active

• Package Description:

  LQFP-100

• Manufacturer Package Code:

  LQFP 100 14x14x1.4

• Country Of Origin:

  Mainland China, Malaysia, Taiwan

• ECCN Code:

  3A991.A.2

• HTS Code:

  8542.31.00.25

• Manufacturer:

  STMicroelectronics

• YTEOL:

  9

• Has ADC:

  YES

• Address Bus Width:

  8

• Bit Size:

  32

• Boundary Scan:

  YES

• CPU Family:

  CORTEX-M7

• Clock Frequency-Max:

  26 MHz

• DAC Channels:

  YES

• DMA Channels:

  YES

• External Data Bus Width:

  16

• Format:

  FLOATING POINT

• Integrated Cache:

  YES

• JESD-30 Code:

  S-PQFP-G100

• JESD-609 Code:

  e3

• Length:

  14 mm

• Low Power Mode:

  YES

• Moisture Sensitivity Level:

  3

• Number of DMA Channels:

  16

• Number of External Interrupts:

  16

• Number of I/O Lines:

  82

• Number of Terminals:

  100

• Number of Timers:

  16

• On Chip Data RAM Width:

  8

• On Chip Program ROM Width:

  8

• Operating Temperature-Max:

  85 °C

• Operating Temperature-Min:

  -40 °C

• PWM Channels:

  YES

• Package Body Material:

  PLASTIC/EPOXY

• Package Code:

  LFQFP

• Package Equivalence Code:

  QFP100,.63SQ,20

• Package Shape:

  SQUARE

• Package Style:

  FLATPACK, LOW PROFILE, FINE PITCH

• Peak Reflow Temperature (Cel):

  260

• RAM (bytes):

  544768

• ROM (words):

  2097152

• ROM Programmability:

  FLASH

• Seated Height-Max:

  1.6 mm

• Speed:

  216 MHz

• Supply Current-Max:

  100 mA

• Supply Voltage-Max:

  3.6 V

• Supply Voltage-Min:

  3.3 V

• Supply Voltage-Nom:

  3.3 V

• Surface Mount:

  YES

• Technology:

  CMOS

• Temperature Grade:

  INDUSTRIAL

• Terminal Finish:

  Matte Tin (Sn)

• Terminal Form:

  GULL WING

• Terminal Pitch:

  0.5 mm

• Terminal Position:

  QUAD

• Time@Peak Reflow Temperature-Max (s):

  30

• Width:

  14 mm

• uPs/uCs/Peripheral ICs Type:

  MICROCONTROLLER, RISC