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STP17N80K5 - STMicroelectronics

Description: N-channel 800 V, 0.29 Ohm typ., 14 A MDmesh K5 Power MOSFET in a TO-220 package

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STP17N80K5 - STMicroelectronics PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - TO-220 type A
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STP17N80K5 - STMicroelectronics  - 3D model - Transistor Outline, Vertical - TO-220 type A
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STP17N80K5 Details

  • Manufacturer Part Number:

    STP17N80K5

  • Brand Name:

    STMicroelectronics

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Manufacturer Package Code:

    TO-220AB

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Manufacturer:

    STMicroelectronics

  • YTEOL:

    0

  • Avalanche Energy Rating (Eas):

    340 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    800 V

  • Drain Current-Max (ID):

    14 A

  • Drain-source On Resistance-Max:

    0.34 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    0.42 pF

  • JEDEC-95 Code:

    TO-220AB

  • JESD-30 Code:

    R-PSFM-T3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    170 W

  • Pulsed Drain Current-Max (IDM):

    56 A

  • Surface Mount:

    NO

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

STP17N80K5 Frequently Asked Questions (FAQs)

  • The maximum safe operating area (SOA) of the STP17N80K5 is not explicitly stated in the datasheet, but it can be estimated based on the device's thermal and electrical characteristics. A safe operating area can be defined as the region where the device can operate without exceeding its maximum ratings. For the STP17N80K5, this region is typically bounded by the maximum drain-source voltage (Vds), maximum drain current (Id), and maximum junction temperature (Tj). Engineers can use simulation tools or consult with STMicroelectronics' application notes to determine the SOA for their specific application.
  • To ensure the STP17N80K5 is properly biased for optimal performance, engineers should follow the recommended biasing conditions outlined in the datasheet. This includes setting the gate-source voltage (Vgs) within the recommended range, typically between 2V and 10V, and ensuring the drain-source voltage (Vds) is within the maximum rating. Additionally, engineers should consider the device's threshold voltage (Vth) and ensure the gate-source voltage is sufficient to fully turn on the device. Proper biasing is critical to achieve the desired performance, efficiency, and reliability.
  • Thermal management is critical for the STP17N80K5, as excessive junction temperature (Tj) can lead to reduced performance, reliability, and lifespan. Engineers should consider the device's thermal resistance (Rthja), maximum junction temperature, and power dissipation (Pd) when designing their thermal management strategy. This may involve using heat sinks, thermal interfaces, or other cooling solutions to keep the junction temperature within the recommended range. STMicroelectronics provides thermal management guidelines and recommendations in their application notes and datasheets.
  • Electrostatic discharge (ESD) can damage the STP17N80K5, so engineers should take precautions to prevent ESD events. This includes handling the device with anti-static wrist straps, mats, or other ESD protection equipment. During PCB design, engineers should consider adding ESD protection components, such as TVS diodes or ESD protection arrays, to protect the device from ESD events. Additionally, engineers should follow proper soldering and assembly procedures to minimize the risk of ESD damage.
  • Proper PCB layout and design are critical for the STP17N80K5 to ensure optimal performance, reliability, and thermal management. Engineers should consider the device's pinout, thermal pad, and package dimensions when designing their PCB. This includes providing adequate clearance around the device, using thermal vias to dissipate heat, and minimizing parasitic inductance and capacitance. STMicroelectronics provides PCB layout guidelines and recommendations in their application notes and datasheets.

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STP17N80K5 Overview

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About STMicroelectronics

STMicroelectronics (ST) is a global semiconductor company that designs, manufactures, and markets a broad range of integrated circuits (ICs), discrete devices, and other electronic components. STMicroelectronics offers a diverse portfolio of semiconductor products covering a wide range of applications and industries. Their product categories include microcontrollers, analog and mixed-signal ICs, MEMS (Micro-Electro-Mechanical Systems) sensors, power management ICs, RF (Radio Frequency) transceivers, aut

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