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SZESD8351P2T5G - onsemi

Description: These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant; Low ESD Clamping Voltage; Protection for the Following IEC Standards: IEC 6100042 (Level 4); Low Capacitance (0.55 pF Max, I/O to GND)

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SZESD8351P2T5G - onsemi PCB footprint - Small Outline Diode Flat Lead - Small Outline Diode Flat Lead - SOD-923 CASE 514AB
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SZESD8351P2T5G - onsemi  - 3D model - Small Outline Diode Flat Lead - SOD-923 CASE 514AB
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SZESD8351P2T5G Details

  • Manufacturer Part Number:

    SZESD8351P2T5G

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    SOD-923-2

  • Package Description:

    SOD-923, 2 PIN

  • Manufacturer Package Code:

    514AB

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • HTS Code:

    8541.10.00.50

  • Factory Lead Time:

    9 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    6.81

  • Additional Feature:

    ULTRA LOW CAPACITANCE

  • Breakdown Voltage-Max:

    7.8 V

  • Breakdown Voltage-Min:

    5.5 V

  • Breakdown Voltage-Nom:

    7 V

  • Clamping Voltage-Max:

    10 V

  • Configuration:

    SINGLE, 1 CHANNEL

  • Diode Element Material:

    SILICON

  • Diode Type:

    TRANS VOLTAGE SUPPRESSOR DIODE

  • JESD-30 Code:

    R-PDSO-F2

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    2

  • Operating Temperature-Max:

    125 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity:

    UNIDIRECTIONAL

  • Reference Standard:

    AEC-Q101

  • Rep Pk Reverse Voltage-Max:

    3.3 V

  • Reverse Current-Max:

    0.5 µA

  • Reverse Test Voltage:

    3.3 V

  • Surface Mount:

    YES

  • Technology:

    AVALANCHE

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

SZESD8351P2T5G Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane and a separate power plane is recommended. Keep the input and output traces short and away from each other to minimize noise coupling.
  • The SZESD8351P2T5G requires a bias voltage of 2.5V to 5.5V. Ensure the bias voltage is stable and noise-free, and that the input voltage is within the recommended range.
  • The SZESD8351P2T5G can operate up to 5 GHz, but the maximum operating frequency may vary depending on the specific application and PCB layout.
  • The SZESD8351P2T5G has built-in ESD protection, but additional protection measures such as TVS diodes or ESD arrays may be necessary depending on the application and environment.
  • A heat sink or thermal pad is recommended to keep the junction temperature below 150°C. Ensure good airflow and avoid blocking airflow around the device.

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SZESD8351P2T5G Overview

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